公开(公告)号：US10297747B2

公开(公告)日：2019-05-21

申请号：US15958444

申请日：2018-04-20

Applicant: Everspin Technologies, Inc.

Inventor： Sarin A. Deshpande ,  Sanjeev Aggarwal ,  Moazzem Hossain

IPC: G11C11/16 ,  H01L27/22 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12 ,  H01L21/768

Abstract: The present disclosure is drawn to, among other things, a method of fabricating an integrated circuit device having a magnetoresistive device. In some aspects, the method includes forming the magnetoresistive device on a first contact of a substrate, wherein the magnetoresistive device includes a fixed magnetic region and a free magnetic region separated by an intermediate region; depositing a first dielectric material over the magnetoresistive device; depositing a second dielectric material over the first dielectric material; polishing a surface of the second dielectric material; forming a first cavity through the polished surface of the second dielectric material to expose a surface of the magnetoresistive device; and depositing an electrically conductive material in the first cavity to form a via.

公开(公告)号：US09865804B2

公开(公告)日：2018-01-09

申请号：US15630377

申请日：2017-06-22

Applicant: Everspin Technologies, Inc.

Inventor： Sarin A. Deshpande ,  Sanjeev Aggarwal ,  Kerry Joseph Nagel

IPC: H01L43/12 ,  H01L43/08 ,  G11B5/84 ,  G11C11/16 ,  H01L27/22 ,  H01L43/02

CPC classification number: H01L43/12 ,  G11B5/84 ,  G11C11/161 ,  H01L27/222 ,  H01L43/02 ,  H01L43/08

Abstract: A magnetoresistive-based device and method of manufacturing a magnetoresistive-based device using one or more hard masks. The process of manufacture, in one embodiment, includes patterning a mask over a selected portion of the third layer of ferromagnetic material, wherein the mask is a metal hard mask. Thereafter, etching through the third layer of ferromagnetic material to provide sidewalls of the second synthetic antiferromagnetic structure, through the second tunnel barrier layer to form a second tunnel barrier and provide sidewalls thereof and the second layer of ferromagnetic material to provide sidewalls thereof. Thereafter, etching, through the first tunnel barrier layer to form a first tunnel barrier to provide sidewalls thereof and etching the first layer of ferromagnetic material to provide sidewalls thereof. The process may then include oxidizing the sidewalls of (i) the first tunnel barrier and (ii) the first layer of ferromagnetic material. Thereafter, the metal hard mask may be connected to an electrical conductor.

公开(公告)号：US09837603B1

公开(公告)日：2017-12-05

申请号：US15291999

申请日：2016-10-12

Applicant: Everspin Technologies, Inc.

Inventor： Sarin A. Deshpande ,  Sanjeev Aggarwal

IPC: H01L43/08 ,  H01L43/12 ,  H01L43/02 ,  H01L27/22

CPC classification number: H01L43/08 ,  H01L27/222 ,  H01L43/02 ,  H01L43/12

Abstract: Encapsulation of the magnetoresistive device after formation protects the sidewalls of the magnetoresistive device from degradation during subsequent deposition of interlayer dielectric material. The encapsulation also helps prevent short circuits between the top electrode of the magnetoresistive device and underlying layers within the magnetoresistive device. The encapsulation can be accomplished by depositing a layer of encapsulating material after device formation, where an etch back operation selectively removes the portions of the layer of encapsulating material other than the material on the sidewalls of the magnetoresistive device.

公开(公告)号：US20170288136A1

公开(公告)日：2017-10-05

申请号：US15630377

申请日：2017-06-22

Applicant: Everspin Technologies, Inc.

Inventor： Sarin A. Deshpande ,  Sanjeev Aggarwal ,  Kerry Joseph Nagel

IPC: H01L43/08 ,  H01L43/12 ,  H01L27/22 ,  H01L43/02 ,  G11B5/84 ,  G11C11/16

CPC classification number: H01L43/12 ,  G11B5/84 ,  G11C11/161 ,  H01L27/222 ,  H01L43/02 ,  H01L43/08

Abstract: A magnetoresistive-based device and method of manufacturing a magnetoresistive-based device using one or more hard masks. The process of manufacture, in one embodiment, includes patterning a mask over a selected portion of the third layer of ferromagnetic material, wherein the mask is a metal hard mask. Thereafter, etching through the third layer of ferromagnetic material to provide sidewalls of the second synthetic antiferromagnetic structure, through the second tunnel barrier layer to form a second tunnel barrier and provide sidewalls thereof and the second layer of ferromagnetic material to provide sidewalls thereof. Thereafter, etching, through the first tunnel barrier layer to form a first tunnel barrier to provide sidewalls thereof and etching the first layer of ferromagnetic material to provide sidewalls thereof. The process may then include oxidizing the sidewalls of (i) the first tunnel barrier and (ii) the first layer of ferromagnetic material. Thereafter, the metal hard mask may be connected to an electrical conductor.

公开(公告)号：US09466788B2

公开(公告)日：2016-10-11

申请号：US14492768

申请日：2014-09-22

Applicant: Everspin Technologies, Inc.

Inventor： Sarin A. Deshpande ,  Sanjeev Aggarwal ,  Kerry Joseph Nagel

IPC: H01L43/12

CPC classification number: H01L43/12

Abstract: A two-step etching process is used to form the top electrode for a magnetoresistive device. The etching chemistries are different for each of the two etching steps. The first chemistry used to etch the top portion of the electrode is more selective with respect to the conductive material of the top electrode, thereby reducing unwanted erosion of the photoresist and hard mask layers. The second chemistry is less corrosive than the first chemistry and does not damage the layers underlying the top electrode, such as those included in the magnetic tunnel junction.

Abstract translation: 使用两步蚀刻工艺来形成用于磁阻器件的顶部电极。 蚀刻化学品对于两个蚀刻步骤中的每一个都是不同的。 用于蚀刻电极顶部的第一化学品相对于顶部电极的导电材料更具选择性，从而减少光致抗蚀剂和硬掩模层的不必要的侵蚀。 第二种化学物质比第一种化学物质具有更少的腐蚀性，并且不会破坏顶部电极下面的层，例如包含在磁性隧道结中的层。

公开(公告)号：US20160225981A1

公开(公告)日：2016-08-04

申请号：US15013950

申请日：2016-02-02

Applicant: Everspin Technologies, Inc.

Inventor： Sarin A. Deshpande ,  Kerry Joseph Nagel ,  Chaitanya Mudivarthi ,  Sanjeev Aggarwal

IPC: H01L43/12 ,  H01L43/08 ,  H01L43/02

CPC classification number: H01L43/12 ,  H01L43/08

Abstract: A method of manufacturing a magnetoresistive stack/structure comprising etching through a second magnetic region to (i) provide sidewalls of the second magnetic region and (ii) expose a surface of a dielectric layer; depositing a first encapsulation layer on the sidewalls of the second magnetic region and over the dielectric layer; etching (i) the first encapsulation layer which is disposed over the exposed surface of the dielectric layer and (ii) re-deposited material disposed on the dielectric layer, wherein, thereafter a portion of the first encapsulation layer remains on the sidewalls of the second magnetic region. The method further includes depositing a second encapsulation layer: (i) on the first encapsulation layer disposed on the sidewalls of the second magnetic region and (ii) over the exposed surface of the dielectric layer; and etching the remaining layers of the stack/structure (via one or more etch processes).

Abstract translation: 一种制造磁阻堆叠/结构的方法，包括通过第二磁性区域蚀刻以（i）提供第二磁性区域的侧壁和（ii）暴露电介质层的表面; 在所述第二磁性区域的侧壁上并在所述电介质层上方沉积第一封装层; 蚀刻（i）设置在电介质层的暴露表面上的第一封装层和（ii）设置在电介质层上的再沉积材料，其后，第一封装层的一部分保留在第二封装层的侧壁上 磁区。 该方法还包括沉积第二封装层：（i）在设置在第二磁区的侧壁上的第一封装层上，和（ii）在介电层的暴露表面上; 并蚀刻堆叠/结构的剩余层（经由一个或多个蚀刻工艺）。

公开(公告)号：US20160211441A1

公开(公告)日：2016-07-21

申请号：US15081397

申请日：2016-03-25

Applicant: Everspin Technologies, Inc.

Inventor： Sarin A. Deshpande ,  Sanjeev Aggarwal

IPC: H01L43/08 ,  G11C11/16 ,  H01L27/22 ,  H01L43/02 ,  H01L43/12

CPC classification number: H01L43/12 ,  G11B5/84 ,  G11C11/161 ,  H01L27/222 ,  H01L43/02 ,  H01L43/08

Abstract: A magnetoresistive-based device and method of manufacturing a magnetoresistive-based device using a plurality of masks. The magnetoresistive-based device includes magnetic material layers formed between a first electrically conductive layer and a second electrically conductive layer, the magnetic materials layers including a tunnel barrier layer formed between a first magnetic materials layer and a second magnetic materials layer. In one embodiment, the method may include removing the first electrically conductive layer and the first magnetic materials layer unprotected by a first mask, to form a first electrode and a first magnetic materials, respectively, and removing the tunnel barrier layer and the second magnetic materials layer unprotected by a second mask to form a tunnel barrier and second magnetic materials, and the second electrically conductive layer unprotected by the second mask to form, and a second electrode.

Abstract translation: 一种基于磁阻的装置和使用多个掩模制造基于磁阻的装置的方法。 基于磁阻的器件包括在第一导电层和第二导电层之间形成的磁性材料层，所述磁性材料层包括在第一磁性材料层和第二磁性材料层之间形成的隧道势垒层。 在一个实施例中，该方法可以包括去除第一导电层和未被第一掩模保护的第一磁性材料层，分别形成第一电极和第一磁性材料，并且去除隧道势垒层和第二磁性材料 层，其不被第二掩模保护以形成隧道势垒和第二磁性材料，以及不被第二掩模保护的第二导电层以形成第二电极。

公开(公告)号：US09269894B2

公开(公告)日：2016-02-23

申请号：US14296153

申请日：2014-06-04

Applicant: Everspin Technologies, Inc.

Inventor： Chaitanya Mudivarthi ,  Sarin A. Deshpande ,  Sanjeev Aggarwal

IPC: H01L43/12 ,  H01L43/08 ,  H01L27/22

CPC classification number: H01L43/12 ,  G11B5/3163 ,  G11C11/161 ,  H01L27/222 ,  H01L27/228 ,  H01L43/02 ,  H01L43/08 ,  Y10T29/49021

Abstract: Isolation of magnetic layers in the magnetoresistive stack is achieved by passivation of sidewalls of the magnetic layers or deposition of a thin film of non-magnetic dielectric material on the sidewalls prior to subsequent etching steps. Etching the magnetic layers using a non-reactive gas further prevents degradation of the sidewalls.

Abstract translation: 通过在后续蚀刻步骤之前钝化磁性层的侧壁或在侧壁上沉积非磁性介电材料的薄膜来实现磁阻堆叠中的磁性层的隔离。 使用非反应性气体蚀刻磁性层进一步防止侧壁的劣化。

公开(公告)号：US10700268B2

公开(公告)日：2020-06-30

申请号：US16108762

申请日：2018-08-22

Applicant: Everspin Technologies, Inc.

Inventor： Kerry Joseph Nagel ,  Sanjeev Aggarwal ,  Sarin A. Deshpande

IPC: H01L43/12 ,  H01L43/08 ,  G11C11/16 ,  H01L43/02 ,  H01L43/10

Abstract: A method of fabricating a magnetoresistive bit from a magnetoresistive stack includes (a) etching through at least a portion of a thickness of the surface region to create a first set of exposed areas in the form of multiple strips extending in a first direction, and (b) etching through at least a portion of a thickness of the surface region to create a second set of exposed areas in the form of multiple strips extending in a second direction. The first set of exposed areas and the second set of exposed areas may have multiple areas that overlap. The method may also include, (c) after the etching in (a) and (b), etching through at least a portion of the thickness of the magnetoresistive stack through the first set and second set of exposed areas.

公开(公告)号：US10461251B2

公开(公告)日：2019-10-29

申请号：US16107543

申请日：2018-08-21

Applicant: Everspin Technologies, Inc.

Inventor： Sanjeev Aggarwal ,  Sarin A. Deshpande ,  Kerry Joseph Nagel

IPC: H01L43/12 ,  H01L27/22

Abstract: A method of fabricating a magnetoresistive bit from a magnetoresistive stack includes etching through a first portion of the magnetoresistive stack using a first etch process to form one or more sidewalls. At least a portion of the sidewalls includes redeposited material after the etching. The method also includes modifying at least a portion of the redeposited material on the sidewalls, and etching through a second portion of the magnetoresistive stack after the modifying step. The magnetoresistive stack may include a first magnetic region, an intermediate region disposed over the first magnetic region, and a second magnetic region disposed over the intermediate region.