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公开(公告)号：US12290001B2
公开(公告)日：2025-04-29
申请号：US18526636
申请日：2023-12-01
Applicant: Everspin Technologies, Inc.
Inventor： Sanjeev Aggarwal , Sarin A. Deshpande , Kerry Joseph Nagel
Abstract: A method of fabricating a magnetoresistive bit from a magnetoresistive stack includes etching through a first portion of the magnetoresistive stack using a first etch process to form one or more sidewalls. At least a portion of the sidewalls includes redeposited material after the etching. The method also includes modifying at least a portion of the redeposited material on the sidewalls, and etching through a second portion of the magnetoresistive stack after the modifying step. The magnetoresistive stack may include a first magnetic region, an intermediate region disposed over the first magnetic region, and a second magnetic region disposed over the intermediate region.
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公开(公告)号：US11043630B2
公开(公告)日：2021-06-22
申请号：US16695396
申请日：2019-11-26
Applicant: Everspin Technologies, Inc.
Inventor： Sanjeev Aggarwal , Sarin A. Deshpande
IPC: H01L43/04 , H01L21/3065 , H01L43/14
Abstract: A magnetoresistive device may include an intermediate region positioned between a magnetically fixed region and a magnetically free region, and spin Hall channel region extending around a sidewall of at least the magnetically free region. An insulator region may extend around a portion of the sidewall such that the insulator region contacts a first portion of the sidewall and the spin Hall channel region contacts a second portion of the sidewall.
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公开(公告)号：US10461250B2
公开(公告)日：2019-10-29
申请号：US16050749
申请日：2018-07-31
Applicant: Everspin Technologies, Inc.
Inventor： Sarin A. Deshpande , Kerry Joseph Nagel , Chaitanya Mudivarthi , Sanjeev Aggarwal
Abstract: A method of manufacturing a magnetoresistive stack/structure comprising (a) etching through a second magnetic region to (i) provide sidewalls of the second magnetic region and (ii) expose a surface of a dielectric layer, (b) depositing a first encapsulation layer on the sidewalls of the second magnetic region and over a surface of the dielectric layer, (c) thereafter: (i) etching the first encapsulation layer which is disposed over the dielectric layer using a first etch process, and (ii) etching re-deposited material using a second etch process, wherein, after such etching, a portion of the first encapsulation layer remains on the sidewalls of the second magnetic region, (d) etching (i) through the dielectric layer to form a tunnel barrier and provide sidewalls thereof and (ii) etching the first magnetic region to provide sidewalls thereof, and (e) depositing a second encapsulation layer on the sidewalls of the tunnel barrier and first magnetic region.
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公开(公告)号：US10056544B2
公开(公告)日：2018-08-21
申请号：US15638757
申请日：2017-06-30
Applicant: Everspin Technologies, Inc.
Inventor： Chaitanya Mudivarthi , Sarin A. Deshpande , Sanjeev Aggarwal
CPC classification number: H01L43/12 , G11B5/3163 , G11C11/161 , H01L27/222 , H01L27/228 , H01L43/02 , H01L43/08 , Y10T29/49021
Abstract: Methods for manufacturing magnetoresistive devices are presented in which isolation of magnetic layers in the magnetoresistive stack is achieved by oxidizing exposed sidewalls of the magnetic layers and then depositing additional encapsulating material prior to subsequent etching steps. Etching the magnetic layers using a non-reactive gas further prevents degradation of the sidewalls.
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5.发明申请公开(公告)号：US20160315253A1
公开(公告)日：2016-10-27
申请号：US15147682
申请日：2016-05-05
Applicant: Everspin Technologies, Inc.
Inventor： Sarin A. Deshpande , Sanjeev Aggarwal , Kerry Joseph Nagel , Chaitanya Mudivarthi , Nicholas Rizzo , Jason Allen Janesky
CPC classification number: H01L43/12 , H01L27/222 , H01L43/08
Abstract: In forming a top electrode for a magnetoresistive device, photoresist used in patterning the electrode is stripped using a non-reactive stripping process. Such a non-reactive stripping process uses water vapor or some other non-oxidizing gas that also passivates exposed portions the magnetoresistive device. In such magnetoresistive devices, a non-reactive spacer layer is included that helps prevent diffusion between layers in the magnetoresistive device, where the non-reactive nature of the spacer layer prevents sidewall roughness that can interfere with accurate formation of the lower portions of the magnetoresistive device.
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Patent Agency Ranking
6.发明申请NON-REACTIVE PHOTORESIST REMOVAL AND SPACER LAYER OPTIMIZATION IN A MAGNETORESISTIVE DEVICE 有权磁性装置中的非反应性光电离层去除和间隔层优化公开(公告)号：US20150236249A1
公开(公告)日：2015-08-20
申请号：US14296189
申请日：2014-06-04
Applicant: Everspin Technologies, Inc.
Inventor： Sarin A. Deshpande , Kerry Joseph Nagel , Sanjeev Aggarwal , Chaitanya Mudivarthi
CPC classification number: H01L43/12 , H01L27/222 , H01L43/08
Abstract: In forming a top electrode for a magnetoresistive device, photoresist used in patterning the electrode is stripped using a non-reactive stripping process. Such a non-reactive stripping process uses water vapor or some other non-oxidizing gas that also passivates exposed portions the magnetoresistive device. In such magnetoresistive devices, a non-reactive spacer layer is included that helps prevent diffusion between layers in the magnetoresistive device, where the non-reactive nature of the spacer layer prevents sidewall roughness that can interfere with accurate formation of the lower portions of the magnetoresistive device.
Abstract translation: 在形成用于磁阻器件的顶部电极时，使用非反应性剥离工艺剥离用于图案化电极的光致抗蚀剂。 这种非反应性汽提方法使用水蒸汽或一些其它非氧化气体，其也钝化了磁阻装置的暴露部分。 在这种磁阻器件中，包括非反应性间隔层，其有助于防止磁阻器件中的层之间的扩散，其中间隔层的非反应性质防止可能干扰磁阻的下部的精确形成的侧壁粗糙度 设备。
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公开(公告)号：US20150102006A1
公开(公告)日：2015-04-16
申请号：US14296153
申请日：2014-06-04
Applicant: Everspin Technologies, Inc.
Inventor： Chaitanya Mudivarthi , Sarin A. Deshpande , Sanjeev Aggarwal
IPC: H01L41/47
CPC classification number: H01L43/12 , G11B5/3163 , G11C11/161 , H01L27/222 , H01L27/228 , H01L43/02 , H01L43/08 , Y10T29/49021
Abstract: Isolation of magnetic layers in the magnetoresistive stack is achieved by passivation of sidewalls of the magnetic layers or deposition of a thin film of non-magnetic dielectric material on the sidewalls prior to subsequent etching steps. Etching the magnetic layers using a non-reactive gas further prevents degradation of the sidewalls.
Abstract translation: 通过在后续蚀刻步骤之前钝化磁性层的侧壁或在侧壁上沉积非磁性介电材料的薄膜来实现磁阻堆叠中的磁性层的隔离。 使用非反应性气体蚀刻磁性层进一步防止侧壁的劣化。
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公开(公告)号：US12075630B2
公开(公告)日：2024-08-27
申请号：US18045539
申请日：2022-10-11
Applicant: Everspin Technologies, Inc.
Inventor： Kerry Joseph Nagel , Sanjeev Aggarwal , Thomas Andre , Sarin A. Deshpande
CPC classification number: H10B61/00 , G11C11/161 , H10N50/01 , H10N50/10 , H10N50/80
Abstract: Magnetoresistive device architectures and methods for manufacturing are presented that facilitate integration of process steps associated with forming such devices into standard process flows used for surrounding logic/circuitry. In some embodiments, the magnetoresistive device structures are designed such that the devices are able to fit within the vertical dimensions of the integrated circuit associated with a single metal layer and a single layer of interlayer dielectric material. Integrating the processing for the magnetoresistive devices can include using the same standard interlayer dielectric material as used in the surrounding circuits on the integrated circuit as well as using standard vias to interconnect to at least one of the electrodes of the magnetoresistive devices.
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公开(公告)号：US12063865B2
公开(公告)日：2024-08-13
申请号：US16989155
申请日：2020-08-10
Applicant: Everspin Technologies, Inc.
Inventor： Sanjeev Aggarwal , Sarin A. Deshpande , Kerry Joseph Nagel
Abstract: A method of fabricating a magnetoresistive bit from a magnetoresistive stack includes etching through a first portion of the magnetoresistive stack using a first etch process to form one or more sidewalls. At least a portion of the sidewalls includes redeposited material after the etching. The method also includes modifying at least a portion of the redeposited material on the sidewalls, and etching through a second portion of the magnetoresistive stack after the modifying step. The magnetoresistive stack may include a first magnetic region, an intermediate region disposed over the first magnetic region, and a second magnetic region disposed over the intermediate region.
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公开(公告)号：US11482570B2
公开(公告)日：2022-10-25
申请号：US17134865
申请日：2020-12-28
Applicant: Everspin Technologies, Inc.
Inventor： Kerry Joseph Nagel , Sanjeev Aggarwal , Thomas Andre , Sarin A. Deshpande
Abstract: Magnetoresistive device architectures and methods for manufacturing are presented that facilitate integration of process steps associated with forming such devices into standard process flows used for surrounding logic/circuitry. In some embodiments, the magnetoresistive device structures are designed such that the devices are able to fit within the vertical dimensions of the integrated circuit associated with a single metal layer and a single layer of interlayer dielectric material. Integrating the processing for the magnetoresistive devices can include using the same standard interlayer dielectric material as used in the surrounding circuits on the integrated circuit as well as using standard vias to interconnect to at least one of the electrodes of the magnetoresistive devices.
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