公开(公告)号：US20030160271A1

公开(公告)日：2003-08-28

申请号：US10388447

申请日：2003-03-17

Applicant: FUJITSU LIMITED

Inventor： Kazuo Itabashi ,  Osamu Tsuboi ,  Yuji Yokoyama ,  Kenichi Inoue ,  Koichi Hashimoto ,  Wataru Futo

IPC: H01L027/108

CPC classification number: H01L27/10852 ,  H01L21/76897 ,  H01L27/105 ,  H01L27/10805 ,  H01L27/10817 ,  H01L28/91

Abstract: A semiconductor memory device comprising: a first insulating film covering the upper and side surfaces of a gate electrode; a second insulating film formed on the substrate covering the first insulating film; a pair of contact holes formed through the second insulating film and reaching the impurity diffusion regions; a conductive plug embedded in one of the contact holes; a third insulating film formed on the second insulating film covering the conductive plug, and having a first aperture on the other contact hole; a bit line formed on the third insulating film and connected to the other impurity diffusion region through the first aperture and the other contact hole; a fourth insulating film covering the upper and side surfaces of the bit line; a second aperture formed through the third insulating film in alignment with the fourth insulating film covering the side surface of the bit line; a storage electrode formed to extend over the bit line, insulated from the bit line by the third and fourth insulating films, and electrically connected to the conductive plug through the second aperture.

公开(公告)号：US20030035192A1

公开(公告)日：2003-02-20

申请号：US09995588

申请日：2001-11-29

Applicant: FUJITSU LIMITED

Inventor： Yoshihiro Mizuno ,  Satoshi Ueda ,  Osamu Tsuboi ,  Ippei Sawaki ,  Hisao Okuda ,  Fumio Yamagishi ,  Norinao Kouma

IPC: G02B026/00

CPC classification number: G02B26/0841 ,  B01D53/885 ,  B01J8/0453 ,  B01J8/0496 ,  B01J2208/00212 ,  B01J2208/00309 ,  B01J2208/025 ,  B81B2201/045 ,  B81B2203/0136 ,  B81C1/00142 ,  B81C1/00626 ,  B81C2201/0142 ,  C01B3/16 ,  C01B2203/0288 ,  C01B2203/045 ,  C01B2203/0485 ,  Y10S359/904

Abstract: A method of making a micromirror unit is provided. In accordance with the method, a micromirror unit is made from a material substrate having a multi-layer structure composed of silicon layers and at least one intermediate layer. The resulting micromirror unit includes a mirror forming base, a frame and a torsion bar. The method includes the following steps. First, a pre-torsion bar is formed by subjecting one of the silicon layers to etching. The obtained pre-torsion bar is rendered smaller in thickness than the mirror forming base and is held in contact with the intermediate layer. Then, the desired torsion bar is obtained by removing the intermediate layer contacting with the pre-torsion bar.

Abstract translation: 提供了制造微镜单元的方法。 根据该方法，微镜单元由具有由硅层和至少一个中间层构成的多层结构的材料基板制成。 所得到的微镜单元包括反射镜形成基座，框架和扭杆。 该方法包括以下步骤。 首先，通过使一个硅层进行蚀刻来形成预扭杆。 所获得的预扭杆的厚度比反射镜形成基座的厚度小，并与中间层保持接触。 然后，通过去除与预扭杆接触的中间层来获得所需的扭力杆。

公开(公告)号：US20020167039A1

公开(公告)日：2002-11-14

申请号：US10179200

申请日：2002-06-26

Applicant: Fujitsu Limited

Inventor： Osamu Tsuboi ,  Tomohiko Tsutsumi ,  Kazutaka Yoshizawa

IPC: H01L027/108

CPC classification number: H01L27/10855 ,  H01L21/31116 ,  H01L21/76802 ,  H01L27/10814 ,  H01L28/91

Abstract: A semiconductor device comprising: a first insulation film 60 formed above a base substrate 10; a second insulation film 61 formed on the first insulation film and having different etching characteristics from the first insulation film; and a capacitor 79 including a storage electrode 68 formed on the second insulation film, projected therefrom, the storage electrode being formed, extended downward from side surfaces of the second insulation film. The lower ends of the storage electrodes are formed partially below the etching stopper film, whereby the storage electrodes are fixed by the etching stopper film. Accordingly, the storage electrodes are prevented from peeling off in processing, such as wet etching, etc. The semiconductor device can be fabricated at high yields.

公开(公告)号：US20010019864A1

公开(公告)日：2001-09-06

申请号：US09774098

申请日：2001-01-31

Applicant: FUJITSU LIMITED

Inventor： Osamu Tsuboi

IPC: H01L021/8234 ,  H01L021/8242

CPC classification number: H01L28/40 ,  H01L27/10855 ,  H01L27/10885 ,  H01L28/91

Abstract: The semiconductor device comprises a base substrate, a wiring 54 formed on the base substrate, a first insulating film 48, 56 for covering the upper surface and the side surfaces of the wiring 54, an etching stopper film 58 formed on the base substrate and the first insulating film 48, 56, a conductor plug 36b connected to the base substrate through the etching stopper film 58 and projected upper of the base substrate, and a capacitor 79 having one electrode 68 connected to the upper surface and the side surfaces of the conductor plug 36b. The electrode 68 is formed not only on the upper surface of the conductor plug 36b but also on the side walls thereof, whereby the electrode 68 can be fixed to the conductor plug 36b without failure. The electrode 68 is formed not only on the upper surface of the conductor plug 36b but also on the side surfaces thereof in the vicinity of the conductor plug 36b, whereby the electrode 68 can have a large surface area in the vicinity of the side surfaces of the conductor plug 36b. This enables the electrode 68 to be reduced in height.