Ratiometric clock systems for integrated receivers and associated methods
    13.
    发明申请
    Ratiometric clock systems for integrated receivers and associated methods 有权
    用于集成接收机和相关方法的比例时钟系统

    公开(公告)号:US20080008259A1

    公开(公告)日:2008-01-10

    申请号:US11900957

    申请日:2007-09-14

    CPC classification number: H04B1/30

    Abstract: A ratiometric clock system for an integrated receiver and associated method are disclosed that provide an advantageous solution for combining digital signal processing (DSP) circuitry on the same integrated circuit as mixer and local oscillator (LO) generation circuitry. The generation circuitry generates an oscillation signal that is passed through a first divider to generate mixing signals for the mixer and that is passed through a second divider to generate a digital clock signal that is utilized by the DSP circuitry. This digital clock signal can be utilized by integrated analog-to-digital conversion circuitry, as well.

    Abstract translation: 公开了一种用于集成接收机和相关方法的比例时钟系统,其提供用于将数字信号处理(DSP)电路组合在与混频器和本地振荡器(LO)生成电路相同的集成电路上的有利解决方案。 产生电路产生振荡信号,该信号通过第一分频器以产生用于混频器的混频信号,并通过第二分频器产生由DSP电路利用的数字时钟信号。 该数字时钟信号也可以由集成的模数转换电路使用。

    Frequency modulation radio receiver including a noise estimation unit
    14.
    发明申请
    Frequency modulation radio receiver including a noise estimation unit 失效
    包括噪声估计单元的调频无线电接收机

    公开(公告)号:US20070213021A1

    公开(公告)日:2007-09-13

    申请号:US11374533

    申请日:2006-03-13

    CPC classification number: H04B1/1027 H04B17/336

    Abstract: A frequency modulation (FM) radio receiver includes a processing unit that may generate a magnitude value corresponding to a signal strength of each of a plurality of digital samples of a received FM signal. The receiver also includes a noise estimation unit that may filter the magnitude values using a high pass filter and may generate a noise value representative of a noise portion of the received FM signal based upon the filtered magnitude values.

    Abstract translation: 一种频率调制(FM)无线电接收机包括一个处理单元,该处理单元可产生对应于所接收的FM信号的多个数字样本中的每一个的信号强度的幅度值。 接收机还包括噪声估计单元,该噪声估计单元可以使用高通滤波器对幅度值进行滤波,并且可以基于滤波的幅值产生代表所接收的FM信号的噪声部分的噪声值。

    Peak detector
    15.
    发明申请
    Peak detector 有权
    峰值检测器

    公开(公告)号:US20070004359A1

    公开(公告)日:2007-01-04

    申请号:US11172477

    申请日:2005-06-30

    CPC classification number: H03G3/3068

    Abstract: A receiver includes a gain stage, a peak detector and a processor. The gain stage provides an output signal, and the peak detector provides a binary indication of whether the output signal has reached a predetermined threshold. The processor controls the gain stage in response to the binary indication.

    Abstract translation: 接收机包括增益级,峰值检测器和处理器。 增益级提供输出信号,峰值检测器提供输出信号是否达到预定阈值的二进制指示。 处理器响应于二进制指示来控制增益级。

    Method and apparatus for enhancing signal quality within a wireless receiver
    17.
    发明申请
    Method and apparatus for enhancing signal quality within a wireless receiver 有权
    一种用于增强无线接收机内的信号质量的方法和装置

    公开(公告)号:US20050143040A1

    公开(公告)日:2005-06-30

    申请号:US10749012

    申请日:2003-12-30

    CPC classification number: H04B1/0007 H04B1/28

    Abstract: A method and apparatus for enhancing signal quality within a wireless receiver are disclosed. An image of a desired signal is down-converted to a baseband signal by a digital down converter. The energy of the baseband signal is subsequently determined. If the energy of the baseband signal is equal to or greater than a predetermined threshold, then the IF is swapped for any incoming signals. If the energy of the baseband signal is less than the predetermined threshold, then the IF is maintained for any incoming signals.

    Abstract translation: 公开了一种用于增强无线接收机内的信号质量的方法和装置。 所需信号的图像由数字下变频器下变频为基带信号。 随后确定基带信号的能量。 如果基带信号的能量等于或大于预定阈值,则IF被交换用于任何输入信号。 如果基带信号的能量小于预定阈值,则对于任何输入信号都保持IF。

    Digital architecture using one-time programmable (OTP) memory
    18.
    发明申请
    Digital architecture using one-time programmable (OTP) memory 失效
    数字架构采用一次性可编程(OTP)存储器

    公开(公告)号:US20070226477A1

    公开(公告)日:2007-09-27

    申请号:US11385520

    申请日:2006-03-21

    CPC classification number: G06F8/60

    Abstract: In one aspect, the present invention includes an apparatus having a digital signal processor (DSP), a controller coupled to the DSP to provide control signals to the DSP, and a one-time programmable (OTP) memory coupled to the DSP and the controller. The OTP memory may include multiple code portions including a first code block to control the DSP and a second code block to control the controller.

    Abstract translation: 一方面,本发明包括具有数字信号处理器(DSP)的装置,耦合到DSP以向DSP提供控制信号的控制器以及耦合到DSP和控制器的一次可编程(OTP)存储器 。 OTP存储器可以包括多个代码部分,包括用于控制DSP的第一代码块和用于控制控制器的第二代码块。

    Supply regulator
    19.
    发明申请
    Supply regulator 失效
    供应调节器

    公开(公告)号:US20070001657A1

    公开(公告)日:2007-01-04

    申请号:US11273695

    申请日:2005-11-14

    CPC classification number: G05F1/575 Y10S323/901

    Abstract: A technique includes using a first stored energy source to generate a reference signal to circuitry of a supply regulator in response to the regulator being in a startup state. The technique includes using an output signal that is provided by the regulator to generate the reference signal in response to the regulator not being in the startup state.

    Abstract translation: 一种技术包括使用第一存储能量源来响应于调节器处于启动状态而向电源调节器的电路产生参考信号。 该技术包括使用由调节器提供的输出信号以响应于调节器不处于启动状态而产生参考信号。

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