Method and system using computational sigma-delta modulators

    公开(公告)号:US09722626B2

    公开(公告)日:2017-08-01

    申请号:US14589484

    申请日:2015-01-05

    CPC classification number: H03M3/35 G01D5/2291 H03M3/466

    Abstract: An analog-to-digital converter (ADC) is provided includes a first sigma-delta modulator (SDM) electrically coupled to a first signal input. The first SDM includes a first summing junction configured to receive a plurality of inputs to the first SDM. The ADC further includes a second sigma-delta modulator (SDM) electrically coupled to a second signal input. The second SDM includes a second summing junction configured to receive a plurality of inputs to the second SDM. The first SDM also includes a cross-coupled feedback loop from an output of the first SDM to a negative input of the first summing junction and to a positive input of the second summing junction. The second SDM also includes a cross-coupled feedback loop from an output of the second SDM to a negative input of the first summing junction and to a negative input of the second summing junction.

    Monolithic gas-sensing chip assembly and method

    公开(公告)号:US11300534B2

    公开(公告)日:2022-04-12

    申请号:US16562611

    申请日:2019-09-06

    Abstract: A monolithic gas-sensing chip assembly for sensing a gas analyte includes a sensing material to detect the gas analyte, a sensing system including a resistor-capacitor electrical circuit, and a heating element. A sensing circuit measures an electrical response of the sensing system to an alternating electrical current applied to the sensing system at (a) one or more different frequencies, or (b) one or more different resistor-capacitor configurations of the system. One or more processors control a low detection range of the system to the gas, a high detection range of the system to the gas, a linearity of a response of the system to the gas, a dynamic range of measurements of the gas by the system, a rejection of interfering gas analytes by the system, a correction for aging or poisoning of the system, or a rejection of ambient interferences that may affect the electrical response of the system.

    METHOD AND SYSTEM USING COMPUTATIONAL SIGMA-DELTA MODULATORS
    15.
    发明申请
    METHOD AND SYSTEM USING COMPUTATIONAL SIGMA-DELTA MODULATORS 有权
    使用计算SIGMA-DELTA调制器的方法和系统

    公开(公告)号:US20160197620A1

    公开(公告)日:2016-07-07

    申请号:US14589484

    申请日:2015-01-05

    CPC classification number: H03M3/35 G01D5/2291 H03M3/466

    Abstract: An analog-to-digital converter (ADC) is provided includes a first sigma-delta modulator (SDM) electrically coupled to a first signal input. The first SDM includes a first summing junction configured to receive a plurality of inputs to the first SDM. The ADC further includes a second sigma-delta modulator (SDM) electrically coupled to a second signal input. The second SDM includes a second summing junction configured to receive a plurality of inputs to the second SDM. The first SDM also includes a cross-coupled feedback loop from an output of the first SDM to a negative input of the first summing junction and to a positive input of the second summing junction. The second SDM also includes a cross-coupled feedback loop from an output of the second SDM to a negative input of the first summing junction and to a negative input of the second summing junction.

    Abstract translation: 提供了一种模拟 - 数字转换器(ADC),包括电耦合到第一信号输入的第一Σ-Δ调制器(SDM)。 第一SDM包括被配置为接收到第一SDM的多个输入的第一求和点。 ADC还包括电耦合到第二信号输入的第二Σ-Δ调制器(SDM)。 第二SDM包括被配置为接收到第二SDM的多个输入的第二求和结。 第一SDM还包括从第一SDM的输出到第一求和结的负输入和第二求和结的正输入的交叉耦合反馈回路。 第二SDM还包括从第二SDM的输出到第一求和结的负输入和第二求和结的负输入的交叉耦合反馈回路。

    Integrated Diode Das Detector
    16.
    发明申请
    Integrated Diode Das Detector 有权
    集成二极管探测器

    公开(公告)号:US20140301534A1

    公开(公告)日:2014-10-09

    申请号:US13857624

    申请日:2013-04-05

    Abstract: Improved imaging systems are disclosed. More particularly, the present disclosure provides for an improved image sensor assembly for an imaging system, the image sensor assembly having an integrated photodetector array and its associated data acquisition electronics fabricated on the same substrate. By integrating the electronics on the same substrate as the photodetector array, this thereby reduces fabrications costs, and reduces interconnect complexity. Since both the photodiode contacts and the associated electronics are on the same substrate/plane, this thereby substantially eliminates certain expensive/time-consuming processing techniques. Moreover, the co-location of the electronics next to or proximal to the photodetector array provides for a much finer resolution detector assembly since the interconnect bottleneck between the electronics and the photodetector array is substantially eliminated/reduced. The co-location of the electronics next to or proximal to the photodetector array also enables/facilitates programmable pixel configuration for optimal image quality.

    Abstract translation: 公开了改进的成像系统。 更具体地,本公开提供了一种用于成像系统的改进的图像传感器组件,该图像传感器组件具有集成的光电检测器阵列及其在相同基板上制造的相关联的数据采集电子装置。 通过将电子元件集成在与光电检测器阵列相同的基板上,由此降低了制造成本,并降低了互连复杂度。 由于光电二极管触点和相关联的电子器件都在相同的衬底/平面上,因此基本上消除了某些昂贵/耗时的处理技术。 此外,由于电子设备和光电检测器阵列之间的互连瓶颈基本上被消除/减少,所以电子器件靠近光电检测器阵列的共同定位提供了更精细的分辨率检测器组件。 靠近或接近光电检测器阵列的电子设备的共同位置也使得/促进可编程像素配置以获得最佳图像质量。

    SYSTEMS AND METHODS FOR MONITORING SENSORS
    17.
    发明申请
    SYSTEMS AND METHODS FOR MONITORING SENSORS 有权
    用于监测传感器的系统和方法

    公开(公告)号:US20140095102A1

    公开(公告)日:2014-04-03

    申请号:US13630939

    申请日:2012-09-28

    CPC classification number: G01R27/28 G01R31/2824

    Abstract: An impedance analyzer is provided. The analyzer includes a signal excitation generator comprising a digital to analog converter, where a transfer function of the digital to analog converter from digital to analog is programmable. The impedance analyzer further includes a receiver comprising a low noise amplifier (LNA) and an analog to digital converter (ADC), where the LNA is a current to voltage converter; where the programmable digital to analog transfer function is implemented by a direct digital synthesizer (DDS) and a voltage mode digital to analog converter, or a digital phase locked loop (PLL), or both. Further, a multivariable sensor node having an impedance analyzer is provided. Furthermore, a multivariable sensor network having a plurality of multivariable sensor nodes is provided.

    Abstract translation: 提供阻抗分析仪。 该分析器包括一个包括数模转换器的信号激励发生器,其中从数字到模拟的数模转换器的传递函数是可编程的。 该阻抗分析器还包括一个包括低噪声放大器(LNA)和模数转换器(ADC)的接收器,其中LNA是电流到电压转换器; 其中可编程数字到模拟传递功能由直接数字合成器(DDS)和电压模式数模转换器或数字锁相环(PLL)或两者实现。 此外,提供了具有阻抗分析器的多变量传感器节点。 此外,提供了具有多个多变量传感器节点的多变量传感器网络。

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