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公开(公告)号:US10741497B2
公开(公告)日:2020-08-11
申请号:US15897416
申请日:2018-02-15
Applicant: GLOBALFOUNDRIES INC.
Inventor: Jim Shih-Chun Liang
IPC: H01L29/94 , H01L23/535 , H01L23/538 , H01L21/768
Abstract: The present disclosure relates to semiconductor structures and, more particularly, to contact and interconnect structures and methods of manufacture. The structure includes: a single damascene contact structure in electrical contact with a contact of a source region or drain region; and a single damascene interconnect structure in a wiring layer and in direct electrical contact with the single damascene contact structure.
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公开(公告)号:US10347529B2
公开(公告)日:2019-07-09
申请号:US15724431
申请日:2017-10-04
Applicant: GLOBALFOUNDRIES INC.
Inventor: Jim Shih-Chun Liang , Keith Kwong Hon Wong
IPC: H01L21/76 , H01L21/768 , H01L23/498 , H01L23/522 , H01L23/532
Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to interconnect structures and methods of manufacture. The structure includes a metallization feature comprising a fill material and formed within a dielectric layer; at least one cap covering the fill material of the metallization feature, the at least one cap is comprised of a material different than the fill material of the metallization feature; and an interconnect structure in electrical contact with the metallization feature.
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公开(公告)号:US20180138123A1
公开(公告)日:2018-05-17
申请号:US15351750
申请日:2016-11-15
Applicant: GLOBALFOUNDRIES INC.
Inventor: Jim Shih-Chun Liang , Keith Kwong Hon Wong
IPC: H01L23/528 , H01L21/768 , H01L23/532
CPC classification number: H01L23/5283 , H01L21/28556 , H01L21/76814 , H01L21/76843 , H01L21/76846 , H01L21/76847 , H01L21/76849 , H01L21/76855 , H01L21/76856 , H01L21/76865 , H01L21/76879 , H01L21/76889 , H01L23/485 , H01L23/53209 , H01L23/53266 , H01L23/5329 , H01L23/53295
Abstract: Aspects of the present disclosure include a semiconductor device which includes a dielectric layer deposited over a conductive region and an interconnect electrically connecting the conductive region with a top surface of the dielectric layer. The interconnect includes a barrier layer extending from an interior of the dielectric layer to the conductive region and covering the conductive region. The barrier layer encases a cobalt plug. The interconnect includes a tungsten cap on an upper surface of the cobalt plug. The tungsten cap is coplanar with an upper surface of the dielectric layer. A method of manufacturing the semiconductor device is also provided.
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