公开(公告)号：US09147576B2

公开(公告)日：2015-09-29

申请号：US14161724

申请日：2014-01-23

Applicant: International Business Machines Corporation ,  GLOBALFOUNDRIES Inc.

Inventor： David V. Horak ,  Shom S. Ponoth ,  Balasubramanian Pranatharthiharan ,  Ruilong Xie

IPC: H01L21/336 ,  H01L21/28 ,  H01L29/423

CPC classification number: H01L29/0653 ,  H01L21/28008 ,  H01L21/76834 ,  H01L21/76897 ,  H01L23/535 ,  H01L29/0649 ,  H01L29/41783 ,  H01L29/41791 ,  H01L29/4232 ,  H01L29/42376 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/51 ,  H01L29/517 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/78 ,  H01L29/785

Abstract: A method of forming a semiconductor structure includes forming a gate structure having a first conductive material above a semiconductor substrate, gate spacers on opposing sides of the first conductive material, and a first interlevel dielectric (ILD) layer surrounding the gate spacers and the first conductive material. An upper portion of the first conductive material is recessed. The gate spacers are recessed until a height of the gate spacers is less than a height of the gate structure. An isolation liner is deposited above the gate spacers and the first conductive material. A portion of the isolation liner is removed so that a top surface of the first conductive material is exposed. A second conductive material is deposited in a contact hole created above the first conductive material and the gate spacers to form a gate contact.

Abstract translation: 形成半导体结构的方法包括在半导体衬底上形成具有第一导电材料的栅极结构，在第一导电材料的相对侧上的栅极间隔物和围绕栅极间隔物的第一层间电介质（ILD）层和第一导电 材料。 第一导电材料的上部是凹进的。 栅极间隔物凹进直到栅极间隔物的高度小于栅极结构的高度。 隔离衬垫沉积在栅极间隔物和第一导电材料上方。 去除隔离衬垫的一部分，使得第一导电材料的顶表面露出。 第二导电材料沉积在形成在第一导电材料和栅极间隔物上方的接触孔中以形成栅极接触。