公开(公告)号：US12132800B2

公开(公告)日：2024-10-29

申请号：US18367679

申请日：2023-09-13

Applicant: Google LLC

Inventor： Weihuang Wang ,  Prashant Chandra ,  Srinivas Vaduvatha

IPC: H04L67/55 ,  H04L1/1829

CPC classification number: H04L67/55 ,  H04L1/1832

Abstract: A communication technology that provides for handling of failed packet transmissions to reduce retransmission attempts and uses resynchronization to prevent tearing down of connections. Thereby, providing for more resilient connections. In an implementation, an initiator entity may determine that a negative acknowledgment indicates that an operation for a particular packet is completed in error by a target entity, and transmit to the target entity a resynchronization packet without tearing down the connection.

公开(公告)号：US12040988B2

公开(公告)日：2024-07-16

申请号：US17552767

申请日：2021-12-16

Applicant: Google LLC

Inventor： Srinivas Vaduvatha ,  Weihuang Wang ,  Jiazhen Zheng ,  Prashant Chandra

IPC: H04L47/34 ,  H04L67/1097

CPC classification number: H04L47/34 ,  H04L67/1097

Abstract: A communication protocol system is provided for reliable transport of packets. A content addressable memory hardware architecture including an acknowledgment coalescing module in communication with a content addressable memory (CAM). The acknowledgment coalescing module coalesces multiple acknowledgement packets as a single acknowledgement packet to reduce the overall numbers of the packet transmission in the communication protocol system. In addition, the acknowledgment coalescing module may also provide a piggyback mechanism to carry acknowledge information in a regular data packet. Thus, the need to generate a new acknowledgement packet may be eliminated. Accordingly, the network congestion and latency may be reduced, and the communication and transmission efficiency are enhanced.

公开(公告)号：US12019542B2

公开(公告)日：2024-06-25

申请号：US17882802

申请日：2022-08-08

Applicant: Google LLC

Inventor： Abhishek Agarwal ,  Jiazhen Zheng ,  Srinivas Vaduvatha ,  Weihuang Wang ,  Hugh McEvoy Walsh ,  Weiwei Jiang ,  Ajay Venkatesan ,  Prashant R. Chandra

IPC: G06F12/0802

CPC classification number: G06F12/0802 ,  G06F2212/60

Abstract: Aspects of the disclosure are directed to high performance connection cache eviction for reliable transport protocols in data center networking. Connection priorities for connection entries are determined to store the connection entries in a cache based on their connection priority. During cache eviction, the connection entries with a lowest connection priority are evicted from the cache. Cache eviction can be achieved with low latency at a high rate.

公开(公告)号：US11914647B2

公开(公告)日：2024-02-27

申请号：US17833126

申请日：2022-06-06

Applicant: Google LLC

Inventor： Weiwei Jiang ,  Srinivas Vaduvatha ,  Prashant R. Chandra ,  Jiazhen Zheng ,  Hugh McEvoy Walsh ,  Weihuang Wang ,  Abhishek Agarwal

IPC: G06F16/901 ,  G06F3/06

CPC classification number: G06F16/9014 ,  G06F3/0613 ,  G06F3/0659 ,  G06F3/0673 ,  G06F16/9017

Abstract: A hash table system, including a plurality of hash tables, associated with respective hash functions, for storing key-value pairs; an overflow memory for storing key-value pairs moved from the hash tables due to collision; and an arbiter for arbitrating among commands including update commands, match commands, and rehash commands, wherein for each system clock cycle, the arbiter selects as a selected command one of an update command, a match command, or a rehash command, and wherein the hash table system completes execution of each selected command within a bounded number of system clock cycles.

公开(公告)号：US20240045800A1

公开(公告)日：2024-02-08

申请号：US17882802

申请日：2022-08-08

Applicant: Google LLC

Inventor： Abhishek Agarwal ,  Jiazhen Zheng ,  Srinivas Vaduvatha ,  Weihuang Wang ,  Hugh McEvoy Walsh ,  Weiwei Jiang ,  Ajay Venkatesan ,  Prashant R. Chandra

IPC: G06F12/0802

CPC classification number: G06F12/0802 ,  G06F2212/60

Abstract: Aspects of the disclosure are directed to high performance connection cache eviction for reliable transport protocols in data center networking. Connection priorities for connection entries are determined to store the connection entries in a cache based on their connection priority. During cache eviction, the connection entries with a lowest connection priority are evicted from the cache. Cache eviction can be achieved with low latency at a high rate.

公开(公告)号：US20220014468A1

公开(公告)日：2022-01-13

申请号：US16926961

申请日：2020-07-13

Applicant: Google LLC

Inventor： Weihuang Wang ,  Srinivas Vaduvatha ,  Jiazhen Zheng ,  Prashant Chandra

IPC: H04L12/743 ,  H04L12/801 ,  H04L12/26 ,  G06F15/173

Abstract: A communication protocol system is provided for reliable transport of packets. A content addressable memory hardware architecture including a reorder engine and a retransmission engine may be utilized for the reliable transport of the packets. In this regard, a reorder engine includes a content addressable memory (CAM) and one or more processors in communication with the CAM. The one or more processors are configured to receive a first set of data packets when executed by the one or more processors. The one or more processors are configured to access the content addressable memory to process the first set of data packets. The one or more processors are configured to save data information of the first set of the data packets in the content addressable memory.

公开(公告)号：US20240193093A1

公开(公告)日：2024-06-13

申请号：US18583341

申请日：2024-02-21

Applicant: Google LLC

Inventor： Jiazhen Zheng ,  Srinivas Vaduvatha ,  Hugh McEvoy Walsh ,  Prashant R. Chandra ,  Abhishek Agarwal ,  Weihuang Wang ,  Weiwei Jiang

IPC: G06F12/0895 ,  G06F12/0864 ,  G06F12/121

CPC classification number: G06F12/0895 ,  G06F12/0864 ,  G06F12/121

Abstract: A packet cache system includes a cache memory allocator for receiving a memory address corresponding to a non-cache memory and allocated to a packet, and associating the memory address with a cache memory address; a hash table for storing the memory address and the cache memory address, with the memory address as a key and the cache memory address as a value; a cache memory for storing the packet at a location indicated by the cache memory address; and an eviction engine for determining one or more cached packets to remove from the cache memory and place in the non-cache memory when occupancy of the cache memory is high.

公开(公告)号：US11995000B2

公开(公告)日：2024-05-28

申请号：US17834018

申请日：2022-06-07

Applicant: Google LLC

Inventor： Jiazhen Zheng ,  Srinivas Vaduvatha ,  Hugh McEvoy Walsh ,  Prashant R. Chandra ,  Abhishek Agarwal ,  Weihuang Wang ,  Weiwei Jiang

IPC: G06F12/0895 ,  G06F12/0864 ,  G06F12/121

CPC classification number: G06F12/0895 ,  G06F12/0864 ,  G06F12/121

Abstract: A packet cache system includes a cache memory allocator for receiving a memory address corresponding to a non-cache memory and allocated to a packet, and associating the memory address with a cache memory address; a hash table for storing the memory address and the cache memory address, with the memory address as a key and the cache memory address as a value; a cache memory for storing the packet at a location indicated by the cache memory address; and an eviction engine for determining one or more cached packets to remove from the cache memory and place in the non-cache memory when occupancy of the cache memory is high.

公开(公告)号：US20240168996A1

公开(公告)日：2024-05-23

申请号：US18423766

申请日：2024-01-26

Applicant: Google LLC

Inventor： Weiwei Jiang ,  Srinivas Vaduvatha ,  Prashant R. Chandra ,  Jiazhen Zheng ,  Hugh McEvoy Walsh ,  Weihuang Wang ,  Abhishek Agarwal

IPC: G06F16/901 ,  G06F3/06

CPC classification number: G06F16/9014 ,  G06F3/0613 ,  G06F3/0659 ,  G06F3/0673 ,  G06F16/9017

Abstract: A hash table system, including a plurality of hash tables, associated with respective hash functions, for storing key-value pairs; an overflow memory for storing key-value pairs moved from the hash tables due to collision; and an arbiter for arbitrating among commands including update commands, match commands, and rehash commands, wherein for each system clock cycle, the arbiter selects as a selected command one of an update command, a match command, or a rehash command, and wherein the hash table system completes execution of each selected command within a bounded number of system clock cycles.

公开(公告)号：US20240121320A1

公开(公告)日：2024-04-11

申请号：US17961669

申请日：2022-10-07

Applicant: Google LLC

Inventor： Abhishek Agarwal ,  Weihuang Wang ,  Weiwei Jiang ,  Srinivas Vaduvatha ,  Jiazhen Zheng

IPC: H04L67/61 ,  H04L67/55

CPC classification number: H04L67/61 ,  H04L67/55

Abstract: Aspects of the disclosure are directed to a high performance connection scheduler for reliable transport protocols in data center networking. The connection scheduler can handle enqueue events, dequeue events, and update events. The connection scheduler can include a connection queue, scheduling queue, and quality of service arbiter to support scheduling a large number of connections at a high rate.