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公开(公告)号:US20250047601A1
公开(公告)日:2025-02-06
申请号:US18926608
申请日:2024-10-25
Applicant: Google LLC
Inventor: Abhishek Agarwal , Ye Tang , Sean Clark , Sarin Thomas , Hugh McEvoy Walsh , Xiyu Wang
IPC: H04L47/12
Abstract: A flow rate control method for solicited data communications includes receiving, at a first node of a communications network, a request-to-send (RTS) signal from a second node of the communications network, the RTS signal indicating a size of a solicited data transmission of the second node, determining, by the first node, whether a rate-limiting counter is above zero, wherein the rate-limiting counter is programmed to increase at a programmed rate and in response to the rate-limiting counter being above zero, scheduling, by the first node, a clear-to-send (CTS) signal to be sent from the first node to the second node over the communications network, and subtracting, by the first node, a value corresponding to the size of the solicited data transmission of the second node from the rate-limiting counter.
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公开(公告)号:US12199746B2
公开(公告)日:2025-01-14
申请号:US17969095
申请日:2022-10-19
Applicant: Google LLC
Inventor: Abhishek Agarwal , Ye Tang , Prashant R. Chandra , Simon Luigi Sabato , Hema Hariharan
IPC: H04J3/06
Abstract: Aspects of the disclosure are directed to supporting time synchronization across a datacenter network with greater accuracy. The time synchronization includes both software based and hardware based time synchronization mechanisms to provide more precise time synchronization across various nodes in the datacenter network. The software based mechanism can provide the initial coarse time synchronization while the hardware based mechanism can provide the subsequent finer time synchronization.
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公开(公告)号:US20230393987A1
公开(公告)日:2023-12-07
申请号:US17834018
申请日:2022-06-07
Applicant: Google LLC
Inventor: Jiazhen Zheng , Srinivas Vaduvatha , Hugh McEvoy Walsh , Prashant R. Chandra , Abhishek Agarwal , Weihuang Wang , Weiwei Jiang
IPC: G06F12/0895 , G06F12/0864 , G06F12/121
CPC classification number: G06F12/0895 , G06F12/0864 , G06F12/121
Abstract: A packet cache system includes a cache memory allocator for receiving a memory address corresponding to a non-cache memory and allocated to a packet, and associating the memory address with a cache memory address; a hash table for storing the memory address and the cache memory address, with the memory address as a key and the cache memory address as a value; a cache memory for storing the packet at a location indicated by the cache memory address; and an eviction engine for determining one or more cached packets to remove from the cache memory and place in the non-cache memory when occupancy of the cache memory is high.
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公开(公告)号:US20230062889A1
公开(公告)日:2023-03-02
申请号:US17553387
申请日:2021-12-16
Applicant: Google LLC
Inventor: Weihuang Wang , Srinivas Vaduvatha , Xiaoming Wang , Gurushankar Rajamani , Abhishek Agarwal , Jiazhen Zheng , Prashant Chandra
IPC: H04L67/568 , H04L49/00 , H04L69/326 , G06F16/2455
Abstract: An application specific integrated circuit (ASIC) is provided for reliable transport of packets. The network interface card may include a reliable transport accelerator (RTA). The RTA may include a cache lookup database. The RTA may be configured to determine, from a received data packet, a connection identifier and query the cache lookup database for a cache entry corresponding to a connection context having the connection identifier. In response to the query, the RTA may receive a cache hit or a cache miss.
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公开(公告)号:US20240403228A1
公开(公告)日:2024-12-05
申请号:US18327962
申请日:2023-06-02
Applicant: Google LLC
Inventor: Chandan Muddamsetty , Jiazhen Zheng , Weiwei Jiang , Shivang Ghetia , Abhishek Agarwal , Srinivas Vaduvatha
IPC: G06F12/126 , G06F12/123
Abstract: Aspects of the disclosure are directed to a packet cache eviction engine for reliable transport protocols of a network. The packet cache eviction engine can manage on-chip cache occupancy by evicting lower priority packets to off-chip memory and ensuring that higher priority packets are kept on-chip to achieve higher performance and lower latency in processing packets in the network.
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公开(公告)号:US12155573B2
公开(公告)日:2024-11-26
申请号:US17713700
申请日:2022-04-05
Applicant: Google LLC
Inventor: Abhishek Agarwal , Ye Tang , Sean Clark , Sarin Thomas , Hugh McEvoy Walsh , Xiyu Wang
IPC: H04L47/12
Abstract: A flow rate control method for solicited data communications includes receiving, at a first node of a communications network, a request-to-send (RTS) signal from a second node of the communications network, the RTS signal indicating a size of a solicited data transmission of the second node, determining, by the first node, whether a rate-limiting counter is above zero, wherein the rate-limiting counter is programmed to increase at a programmed rate and in response to the rate-limiting counter being above zero, scheduling, by the first node, a clear-to-send (CTS) signal to be sent from the first node to the second node over the communications network, and subtracting, by the first node, a value corresponding to the size of the solicited data transmission of the second node from the rate-limiting counter.
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公开(公告)号:US20240137140A1
公开(公告)日:2024-04-25
申请号:US17969095
申请日:2022-10-18
Applicant: Google LLC
Inventor: Abhishek Agarwal , Ye Tang , Prashant R. Chandra , Simon Luigi Sabato , Hema Hariharan
IPC: H04J3/06
CPC classification number: H04J3/0667
Abstract: Aspects of the disclosure are directed to supporting time synchronization across a datacenter network with greater accuracy. The time synchronization includes both software based and hardware based time synchronization mechanisms to provide more precise time synchronization across various nodes in the datacenter network. The software based mechanism can provide the initial coarse time synchronization while the hardware based mechanism can provide the subsequent finer time synchronization.
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公开(公告)号:US20240064215A1
公开(公告)日:2024-02-22
申请号:US18200074
申请日:2023-05-22
Applicant: Google LLC
Inventor: Srinivas Vaduvatha , Weiwei Jiang , Prashant Chandra , Opeoluwa Oladipo , Jiazhen Zheng , Hugh McEvoy Walsh , Weihuang Wang , Abhishek Agarwal
CPC classification number: H04L69/04 , H03M7/70 , H03M7/6011
Abstract: Compressing connection state information for a network connection including receiving an input bitmap having a sequence of bits describing transmit states and receive states; partitioning the input bitmap into a plurality of equal size blocks; partitioning each of the blocks into a plurality of equal sized sectors; generating a block valid sequence indicating the blocks having at least one bit set; generating, for each block having at least one bit set, a sector information sequence, the sector information sequence indicating, for the corresponding block, the sectors that have at least one bit set and an encoding type for each sector; and generating one or more symbols by encoding each sector that has at least one bit set.
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公开(公告)号:US20230394082A1
公开(公告)日:2023-12-07
申请号:US17833126
申请日:2022-06-06
Applicant: Google LLC
Inventor: Weiwei Jiang , Srinivas Vaduvatha , Prashant R. Chandra , Jiazhen Zheng , Hugh McEvoy Walsh , Weihuang Wang , Abhishek Agarwal
IPC: G06F3/06 , G06F16/901
CPC classification number: G06F3/0659 , G06F16/9014 , G06F16/9017 , G06F3/0613 , G06F3/0673
Abstract: A hash table system, including a plurality of hash tables, associated with respective hash functions, for storing key-value pairs; an overflow memory for storing key-value pairs moved from the hash tables due to collision; and an arbiter for arbitrating among commands including update commands, match commands, and rehash commands, wherein for each system clock cycle, the arbiter selects as a selected command one of an update command, a match command, or a rehash command, and wherein the hash table system completes execution of each selected command within a bounded number of system clock cycles.
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公开(公告)号:US20240193093A1
公开(公告)日:2024-06-13
申请号:US18583341
申请日:2024-02-21
Applicant: Google LLC
Inventor: Jiazhen Zheng , Srinivas Vaduvatha , Hugh McEvoy Walsh , Prashant R. Chandra , Abhishek Agarwal , Weihuang Wang , Weiwei Jiang
IPC: G06F12/0895 , G06F12/0864 , G06F12/121
CPC classification number: G06F12/0895 , G06F12/0864 , G06F12/121
Abstract: A packet cache system includes a cache memory allocator for receiving a memory address corresponding to a non-cache memory and allocated to a packet, and associating the memory address with a cache memory address; a hash table for storing the memory address and the cache memory address, with the memory address as a key and the cache memory address as a value; a cache memory for storing the packet at a location indicated by the cache memory address; and an eviction engine for determining one or more cached packets to remove from the cache memory and place in the non-cache memory when occupancy of the cache memory is high.
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