公开(公告)号：US11100083B2

公开(公告)日：2021-08-24

申请号：US15545526

申请日：2015-01-29

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Hideaki Kimura

IPC: G06F16/00 ,  G06F16/23 ,  G06F16/27 ,  G06F16/901 ,  G06F12/02 ,  G06F12/06

Abstract: Example implementations disclosed herein include techniques for a ready only bufferpool for use in local nodes of a multi-node computing system. Read only transactions executed by a processor can reference a ready only bufferpool resident in a VRAM on the same node. If the desired data page is in the bufferpool the transaction can immediately read data records from the cached data pages. If the desired data page is not in the bufferpool, then the transaction can cause a copy of a corresponding data page in a secondary memory to be installed in the bufferpool. The bufferpool can include more than one copy of a data page simultaneously to handle and prevent cache line misses. Data page are dropped from the bufferpool based on an incrementing per data page counter.

公开(公告)号：US20190042615A1

公开(公告)日：2019-02-07

申请号：US16072055

申请日：2016-01-29

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Tianzheng Wang ,  Hideaki Kimura

IPC: G06F17/30 ,  G06F9/46

Abstract: Hybrid concurrency control in a database transaction is disclosed. A contention value associated with a database object is read. The contention value is dynamically updated based on access patterns of the database object. If the contention value indicates the database object is under high contention, a pessimistic concurrency control mechanism is applied to the database object. An optimistic concurrency control mechanism is applied to the database object if the contention value does not indicate the database object is under high contention.

公开(公告)号：US20180004798A1

公开(公告)日：2018-01-04

申请号：US15545526

申请日：2015-01-29

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Hideaki Kimura

IPC: G06F17/30 ,  G06F12/06 ,  G06F12/02

CPC classification number: G06F16/2365 ,  G06F9/46 ,  G06F12/0238 ,  G06F12/0638 ,  G06F16/00 ,  G06F16/27 ,  G06F16/9014 ,  G06F2212/1024 ,  G06F2212/205 ,  G06F2212/466

Abstract: Example implementations disclosed herein include techniques for a ready only bufferpool for use in local nodes of a multi-node computing system. Read only transactions executed by a processor can reference a ready only bufferpool resident in a VRAM on the same node. If the desired data page is in the bufferpool the transaction can immediately read data records from the cached data pages. If the desired data page is not in the bufferpool, then the transaction can cause a copy of a corresponding data page in a secondary memory to be installed in the bufferpool. The bufferpool can include more than one copy of a data page simultaneously to handle and prevent cache line misses. Data page are dropped from the bufferpool based on an incrementing per data page counter.

公开(公告)号：US11288252B2

公开(公告)日：2022-03-29

申请号：US17079802

申请日：2020-10-26

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Hideaki Kimura

IPC: G06F7/00 ,  G06F16/23 ,  G06F3/06 ,  G06F11/14

Abstract: Example implementations disclosed herein can be used to build, maintain, and access databases built database in multi-core computing systems with large VRAM and huge NVRAM. The database with optimistic concurrency control can be built on a transactional key-value data store that includes logically equivalent data pages stored in both VRAM and VRAM. Data records in volatile data pages in the VRAM represent the most recent version of the data. Data records in the NVRAM immutable and are organized in a stratified composite snapshot. A distributed log gleaner process is used to process log entries corresponding to transactions on the volatile data pages and construct the snapshot. The log gleaner sorts the log entries by epoch, key range, and most recent use to partition the snapshot across multiple nodes.

公开(公告)号：US11080261B2

公开(公告)日：2021-08-03

申请号：US16072055

申请日：2016-01-29

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Tianzheng Wang ,  Hideaki Kimura

IPC: G06F16/23 ,  G06F16/00 ,  G06F9/46

Abstract: Hybrid concurrency control in a database transaction is disclosed. A contention value associated with a database object is read. The contention value is dynamically updated based on access patterns of the database object. If the contention value indicates the database object is under high contention, a pessimistic concurrency control mechanism is applied to the database object. An optimistic concurrency control mechanism is applied to the database object if the contention value does not indicate the database object is under high contention.

公开(公告)号：US20180300083A1

公开(公告)日：2018-10-18

申请号：US15485399

申请日：2017-04-12

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Haris Volos ,  Hideaki Kimura ,  James Park ,  Daniel Fryer

IPC: G06F3/06

Abstract: An example system for write-ahead logging through a plurality of logging buffers using a non-volatile memory (NVM) is disclosed. The example disclosed herein comprises a processing unit coupled to one or more controllers from one or more client applications. The example also comprises a plurality of logging buffers to receive a plurality of first log data threads based on a predetermined timestamp range, wherein each log buffer stores a single first timestamp log data thread from a plurality of timestamp log data threads. The example further comprises a flusher to flush the plurality of first timestamp log data threads from the plurality of logging buffers to a first timestamp log data. The flusher stores the first timestamp log data to an NVM to build flushed timestamp log data. The example further comprises a syncer to sync the flushed timestamp log data from the NVM to an HD device in time stamp sequential order.

公开(公告)号：US20170351543A1

公开(公告)日：2017-12-07

申请号：US15545551

申请日：2015-01-29

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Hideaki Kimura

IPC: G06F9/46 ,  G06F3/06 ,  G06F17/30

CPC classification number: G06F9/467 ,  G06F3/0619 ,  G06F3/0659 ,  G06F3/0685 ,  G06F16/2365 ,  G06F16/2379 ,  G06F16/9014 ,  G06F16/9024

Abstract: Example implementations disclosed herein include techniques for systems, methods, and devices for a heap data structure organized into linked-lists of epoch data pages on a per-core basis in a multi-core multi-node computing system to handle many concurrent transactions.