公开(公告)号：US10019363B2

公开(公告)日：2018-07-10

申请号：US15507606

申请日：2015-04-03

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Douglas L. Voigt ,  Charles B. Morrey, III ,  Jishen Zhao ,  Dhruva Chakrabarti ,  Joseph E. Foster

IPC: G06F13/12 ,  G06F12/0817 ,  G06F12/1009 ,  G06F9/46

CPC classification number: G06F12/0828 ,  G06F9/467 ,  G06F12/0238 ,  G06F12/08 ,  G06F12/1009 ,  G06F2212/1016 ,  G06F2212/1032 ,  G06F2212/222 ,  G06F2212/60 ,  G06F2212/621 ,  G06F2212/7201

Abstract: Example implementations may relate to a version controller allocating a copy page in persistent memory upon receiving, from an application executing on a processor, a copy command to version an image page for an atomic transaction. The version controller may receive application data addressed to a cache line of the image page, and may write the application data to a cache line of the copy page corresponding to the addressed cache line of the image page. If the version controller receives a replace-type transaction commit command, the version controller may generate a final page by either forward merging the image page into the copy page or backward merging the copy page into the image page, depending a merge direction policy.

公开(公告)号：US20180074959A1

公开(公告)日：2018-03-15

申请号：US15320685

申请日：2014-07-22

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Sheng Li ,  Jishen Zhao ,  Kevin T. Lim ,  Paolo Faraboschi

IPC: G06F12/0815 ,  G06F1/32 ,  G06F13/40

CPC classification number: G06F12/0815 ,  G06F1/3287 ,  G06F1/3296 ,  G06F12/0806 ,  G06F13/14 ,  G06F13/4022 ,  G06F2212/1008 ,  G06F2212/62

Abstract: According to an example, a node-based computing device includes memory nodes communicatively coupled to a processor node. The memory nodes may form a main memory address space for the processor node. The processor node may establish a virtual circuit through memory nodes. The virtual circuit may dedicate a path within the memory nodes. The processor node may then communicate a message through the virtual circuit. The memory nodes may forward the message according to the path dedicated by the virtual circuit.