公开(公告)号：US10572378B2

公开(公告)日：2020-02-25

申请号：US15115307

申请日：2014-03-20

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Sheng Li ,  Jichuan Chang ,  Jishen Zhao

IPC: G06F12/02 ,  G06F12/08 ,  G06F3/06 ,  G06F12/0875 ,  G06F12/0893

Abstract: Dynamic memory expansion based on data compression is described. Data represented in at least one page to be written to a main memory of a computing device is received. The data is compressed in the at least one page to generate at least one compressed physical page and a metadata entry corresponding to each page of the at least one compressed physical page. The metadata entry is cached in a metadata cache including metadata entries and pointers to the uncompressed region of the at least one compressed physical page.

公开(公告)号：US20170004069A1

公开(公告)日：2017-01-05

申请号：US15115307

申请日：2014-03-20

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Sheng Li ,  Jichuan Chang ,  Jishen Zhao

IPC: G06F12/02 ,  G06F12/0893

CPC classification number: G06F12/023 ,  G06F3/0638 ,  G06F12/08 ,  G06F12/0875 ,  G06F12/0893 ,  G06F2212/1044 ,  G06F2212/401 ,  G06F2212/466 ,  G06F2212/608

Abstract: Dynamic memory expansion based on data compression is described. Data represented in at least one page to be written to a main memory of a computing device is received. The data is compressed in the at least one page to generate at least one compressed physical page and a metadata entry corresponding to each page of the at least one compressed physical page. The metadata entry is cached in a metadata cache deluding metadata entries and pointers to the uncompressed region of the at least one compressed physical page.

Abstract translation: 描述了基于数据压缩的动态内存扩展。 接收在要写入计算设备的主存储器的至少一个页面中表示的数据。 所述数据在所述至少一个页面中被压缩以生成与所述至少一个压缩物理页面的每个页面相对应的至少一个压缩物理页面和元数据条目。 元数据条目被缓存在元数据高速缓存中，将元数据条目和指针指向至少一个压缩物理页面的未压缩区域。

公开(公告)号：US20160342351A1

公开(公告)日：2016-11-24

申请号：US15113824

申请日：2014-01-23

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Sheng Li ,  Jishen Zhao ,  Jichuan Chang ,  Parthasarathy Ranganathan ,  Alistair Veitch ,  Kevin T. Lim ,  Mark Lillibridge

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/0658 ,  G06F3/0659 ,  G06F3/0679 ,  G06F11/1471 ,  G06F11/1474 ,  G06F2201/805 ,  G11B27/36

Abstract: A technique includes acquiring a plurality of write requests from at least one memory controller and logging information associated with the plurality of write requests in persistent storage. The technique includes applying the plurality of write requests atomically as a group to persistent storage.

Abstract translation: 一种技术包括从至少一个存储器控制器获取多个写入请求，并在永久存储器中记录与多个写入请求相关联的信息。 该技术包括将多个写请求作为一组原子地应用于持久存储。

公开(公告)号：US20160267015A1

公开(公告)日：2016-09-15

申请号：US15031181

申请日：2013-10-29

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Sheng Li ,  Jishen Zhao ,  Jichuan Chang ,  Parthasarathy Ranganathan ,  Alistair Veitch ,  Kevin T. Lim

IPC: G06F12/10

CPC classification number: G06F12/109 ,  G06F12/10 ,  G06F2212/1041 ,  G06F2212/152 ,  G06F2212/657

Abstract: A method for mapping virtual memory pages to physical memory pages is described. The method includes receiving a mapping of a virtual memory page to multiple physical memory pages, detecting a request for a transaction to be performed on data contained in the multiple physical memory pages, in which the transaction includes a number of data updates, determining which of the number of multiple physical memory pages contains a latest version of the data to be updated by the transaction, updating a physical memory page by performing the transaction within a physical memory page among the multiple physical memory pages that does not contain the latest version of the data, and updating an indication of which of the physical memory pages contains the latest version of the data pertaining to the transaction.

Abstract translation: 描述了将虚拟内存页映射到物理内存页的方法。 该方法包括：接收虚拟存储器页面到多个物理存储器页面的映射，检测对包含在多个物理存储器页面中的数据执行的事务的请求，其中事务包括多个数据更新， 多个物理内存页面的数量包含要由事务更新的数据的最新版本，通过在不包含最新版本的多个物理存储器页面中的物理存储器页面内执行事务来更新物理存储器页面 数据，以及更新物理存储器页面中哪一个包含与交易有关的数据的最新版本的指示。

公开(公告)号：US10254988B2

公开(公告)日：2019-04-09

申请号：US15500754

申请日：2015-03-12

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Rajeev Balasubramonian ,  Gregg B. Lesartre ,  Robert Schreiber ,  Jishen Zhao ,  Naveen Muralimanohar ,  Paolo Faraboschi

IPC: G06F3/06 ,  G06F11/10 ,  G06F12/02 ,  G11C7/10 ,  G11C7/22 ,  G06F12/14

Abstract: Techniques for memory device writes based on mapping are provided. In one aspect, a block of data to be written to a line in a rank of memory may be received. The rank of memory may comprise multiple memory devices. The block of data may be written to a number of memory devices determined by the size of the block of data. A memory device mapping for the line may be retrieved. The mapping may determine the order in which the block of data is written to the memory devices within the rank. The block of data may be written to the memory devices based on the mapping.

公开(公告)号：US10241711B2

公开(公告)日：2019-03-26

申请号：US14774521

申请日：2013-03-14

Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor： Doe Hyun Yoon ,  Sheng Li ,  Jishen Zhao ,  Norman P. Jouppi

IPC: G06F12/00 ,  G06F3/06 ,  G06F12/0868 ,  G06F12/0897 ,  G06F9/46 ,  G06F12/0804 ,  G06F12/0815

Abstract: Example methods and systems to provide persistent memory are disclosed herein. An example system includes a nonvolatile cache to store data received from a volatile cache. The data is associated with a transaction and the data is to be identified as durable when the transaction is committed. The example system includes a nonvolatile memory to store the data received from the nonvolatile cache when the data is identified as durable.

公开(公告)号：US20170220488A1

公开(公告)日：2017-08-03

申请号：US15500460

申请日：2015-03-06

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Rajeev Balasubramonian ,  Naveen Muralimanohar ,  Gregg B. Lesartre ,  Paolo Faraboschi ,  Jishen Zhao

IPC: G06F12/14 ,  G06F11/10 ,  G06F3/06

CPC classification number: G06F12/1408 ,  G06F3/0619 ,  G06F3/0623 ,  G06F3/064 ,  G06F3/0673 ,  G06F11/1012 ,  G06F11/1044 ,  G06F2212/1052 ,  G06F2212/402 ,  H03M7/30 ,  H03M7/6047 ,  H03M13/09

Abstract: Techniques for writing data to a subset of memory devices are described. In one aspect, a block of data to be written to a line in a rank of memory may be received. The rank of memory may comprise a set of memory devices. The block of data may be compressed. The compressed block of data may be written to a subset of the memory devices that comprise the line. The unwritten portions of the line may not be used to store valid data.

公开(公告)号：US20170220257A1

公开(公告)日：2017-08-03

申请号：US15500754

申请日：2015-03-12

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Rajeev Balasubramonian ,  Gregg B. Lesartre ,  Robert Schreiber ,  Jishen Zhao ,  Naveen Muralimanohar ,  Paolo Faraboschi

IPC: G06F3/06 ,  G06F11/10

CPC classification number: G06F3/064 ,  G06F3/061 ,  G06F3/0659 ,  G06F3/0683 ,  G06F11/1012 ,  G06F12/0223 ,  G06F12/1408 ,  G06F2212/401 ,  G11C7/1006 ,  G11C7/22

Abstract: Techniques for memory device writes based on mapping are provided. In one aspect, a block of data to be written to a line in a rank of memory may be received. The rank of memory may comprise multiple memory devices. The block of data may be written to a number of memory devices determined by the size of the block of data. A memory device mapping for the line may be retrieved. The mapping may determine the order in which the block of data is written to the memory devices within the rank. The block of data may be written to the memory devices based on the mapping.

公开(公告)号：US10303622B2

公开(公告)日：2019-05-28

申请号：US15500460

申请日：2015-03-06

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Rajeev Balasubramonian ,  Naveen Muralimanohar ,  Gregg B. Lesartre ,  Paolo Faraboschi ,  Jishen Zhao

IPC: G06F21/00 ,  G06F12/14 ,  H03M7/30 ,  G06F3/06 ,  G06F11/10 ,  H03M13/09

Abstract: Techniques for writing data to a subset of memory devices are described. In one aspect, a block of data to be written to a line in a rank of memory may be received. The rank of memory may comprise a set of memory devices. The block of data may be compressed. The compressed block of data may be written to a subset of the memory devices that comprise the line. The unwritten portions of the line may not be used to store valid data.

公开(公告)号：US10152247B2

公开(公告)日：2018-12-11

申请号：US15113824

申请日：2014-01-23

Applicant: Hewlett Packard Enterprise Development LP

Inventor： Sheng Li ,  Jishen Zhao ,  Jichuan Chang ,  Parthasarathy Ranganathan ,  Alistair Veitch ,  Kevin T. Lim ,  Mark Lillibridge

IPC: G06F3/06 ,  G06F11/14 ,  G11B27/36

Abstract: A technique includes acquiring a plurality of write requests from at least one memory controller and logging information associated with the plurality of write requests in persistent storage. The technique includes applying the plurality of write requests atomically as a group to persistent storage.