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公开(公告)号：US09773782B2
公开(公告)日：2017-09-26
申请号：US15369951
申请日：2016-12-06
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor： Trudy Benjamin
IPC: H01L27/06 , H01L29/78 , H01L21/8234 , H01L27/088 , H01L29/66 , B41J2/14 , H01L29/10
CPC classification number: H01L27/0629 , B41J2/1433 , B41J2002/14491 , H01L21/823425 , H01L21/823456 , H01L21/823468 , H01L27/088 , H01L29/1033 , H01L29/66477 , H01L29/66568 , H01L29/78 , H01L29/783
Abstract: In some examples, a transistor includes a drain, a channel, and a gate. The channel surrounds the drain and has a channel length to width ratio. The gate is over the channel to provide an active channel region that has an active channel region length to width ratio that is greater than the channel length to width ratio.
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公开(公告)号：US20170084609A1
公开(公告)日：2017-03-23
申请号：US15369951
申请日：2016-12-06
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor： Trudy Benjamin
CPC classification number: H01L27/0629 , B41J2/1433 , B41J2002/14491 , H01L21/823425 , H01L21/823456 , H01L21/823468 , H01L27/088 , H01L29/1033 , H01L29/66477 , H01L29/66568 , H01L29/78 , H01L29/783
Abstract: In some examples, a transistor includes a drain, a channel, and a gate. The channel surrounds the drain and has a channel length to width ratio. The gate is over the channel to provide an active channel region that has an active channel region length to width ratio that is greater than the channel length to width ratio.
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公开(公告)号：US20150367639A1
公开(公告)日：2015-12-24
申请号：US14837899
申请日：2015-08-27
Applicant: Hewlett-Packard Development Company, L.P.
Inventor： Ning Ge , Bee Ling Peh , Trudy Benjamin , Ken Kiat Ng , Jianhui Gu
CPC classification number: B41J2/1433 , B23K26/384 , B41J2/14145 , B41J2/14201 , B41J2/162 , B41J2/1634 , B41J2/175 , B41J2002/14419 , Y10T29/49401 , Y10T29/49403
Abstract: The present disclosure describes a compound slot, and systems and methods of forming the compound slot. An example of a compound slot includes a wafer, where the compound slot includes a trench along a long axis of the compound slot and on a top surface of the wafer, where the trench passes through an initial portion of a total depth of the wafer. A number of openings pass through a remaining portion of the total depth of the wafer, where at least a retained portion of a bottom of the trench is present around a perimeter of each of the number of openings.
Abstract translation: 本公开描述了复合槽，以及形成复合槽的系统和方法。 复合槽的示例包括晶片，其中复合槽包括沿着复合槽的长轴的沟槽和晶片的顶表面，其中沟槽穿过晶片的总深度的初始部分。 多个开口穿过晶片的总深度的剩余部分，其中至少沟槽底部的保留部分围绕每个开口的周边存在。
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Patent Agency Ranking
公开(公告)号：US10082414B2
公开(公告)日：2018-09-25
申请号：US15423266
申请日：2017-02-02
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor： Ning Ge , Trudy Benjamin , Teck-Khim Neo , Joseph M. Torgerson , Neel Banerjee , George H. Corrigan, III
CPC classification number: G01F23/263 , B41J2/14153 , B41J2/175 , B41J2/17566 , B41J2002/17579
Abstract: In some examples, an ink level sensor includes a sense capacitor between a first node and ground, a first switch to couple a first voltage to the first node and charge the sense capacitor, a second switch to couple the first node with a second node and share the charge between the sense capacitor and a reference capacitor, causing a second voltage at the second node, and a transistor having a drain, a gate coupled to the second node, and a source coupled to ground, the transistor to provide a drain to source resistance in proportion to the second voltage.
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公开(公告)号：US20170144451A1
公开(公告)日：2017-05-25
申请号：US15423260
申请日：2017-02-02
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor： Ning Ge , Trudy Benjamin , Teck-Khim Neo , Joseph M. Torgerson , Neel Banerjee , George H. Corrigan, III
CPC classification number: G01F23/263 , B41J2/14153 , B41J2/175 , B41J2/17566 , B41J2002/17579
Abstract: In some examples, a method of sensing an ink level includes applying a pre-charge voltage to a sense capacitor to charge the sense capacitor with a charge, sharing the charge between the sense capacitor and a reference capacitor, causing a reference voltage at a gate of an evaluation transistor, and determining a resistance from a drain to a source of the evaluation transistor that results from the reference voltage.
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公开(公告)号：US09289978B2
公开(公告)日：2016-03-22
申请号：US14553827
申请日：2014-11-25
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor： Trudy Benjamin , Joseph Torgerson
CPC classification number: B41J2/04541 , B41J2/04543 , B41J2/0458
Abstract: A fluid ejection device includes a plurality of address lines and a fire line for communicating a fire signal. The device also includes a plurality of nozzle circuits coupled to the fire line and the plurality of address lines. Each nozzle circuit is configured, when enabled, to eject fluid via a different one of a plurality of nozzles in response to the fire signal. A subset of the plurality of address lines is coupled to each pair of the plurality of nozzle circuits. Each subset that is coupled to one of the pairs of nozzle circuits is selected so that simultaneous activation of every address line of that subset simultaneously enables each nozzle circuit in the pair or pairs of nozzle circuits coupled to that triad and none of the other nozzle circuits of the plurality of nozzle circuits.
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公开(公告)号：US20150077451A1
公开(公告)日：2015-03-19
申请号：US14553827
申请日：2014-11-25
Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
Inventor： Trudy Benjamin , Joseph Torgerson
IPC: B41J2/045
CPC classification number: B41J2/04541 , B41J2/04543 , B41J2/0458
Abstract: A fluid ejection device includes a plurality of address lines and a fire line for communicating a fire signal. The device also includes a plurality of nozzle circuits coupled to the fire line and the plurality of address lines. Each nozzle circuit is configured, when enabled, to eject fluid via a different one of a plurality of nozzles in response to the fire signal. A subset of the plurality of address lines is coupled to each pair of the plurality of nozzle circuits. Each subset that is coupled to one of the pairs of nozzle circuits is selected so that simultaneous activation of every address line of that subset simultaneously enables each nozzle circuit in the pair or pairs of nozzle circuits coupled to that triad and none of the other nozzle circuits of the plurality of nozzle circuits.
Abstract translation: 流体喷射装置包括多个地址线和用于传达火情信号的火线。 该装置还包括耦合到火线和多个地址线的多个喷嘴电路。 每个喷嘴电路被配置为在使能时响应于火焰信号通过多个喷嘴中的不同喷嘴喷射流体。 多个地址线的子集耦合到多对喷嘴电路的每一对。 选择耦合到一对喷嘴电路的每个子集，使得该子集的每个地址线的同时激活同时使得耦合到该三元组的一对或几对喷嘴电路中的每个喷嘴电路，而不是其它喷嘴电路 的多个喷嘴电路。
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公开(公告)号：US08864260B1
公开(公告)日：2014-10-21
申请号：US13870123
申请日：2013-04-25
Applicant: Hewlett-Packard Development Company, L.P.
Inventor： Ning Ge , Trudy Benjamin , Teck Khim Neo
CPC classification number: B41J2/04541 , B41J2/04521 , B41J2/0458
Abstract: An integrated circuit (IC) erasable programmable read-only memory (EPROM) structure for a thermal inkjet printhead includes: a fire line to provide fire line data; a select line to provide selecting data; a firing cell coupled to the fire line; an EPROM cell coupled to the fire line; a selector cell coupled to the select line, the firing cell and the EPROM cell; and a data switching circuit to provide address data to the firing cell or the EPROM cell. The data switching circuit and the selector cell selectively enable transfer of the fire line data from the fire line to the firing cell or the EPROM cell as a function of state of the selecting data on the select line and the address data from the data switching circuit.
Abstract translation: 用于热喷墨打印头的集成电路（IC）可擦除可编程只读存储器（EPROM）结构包括：用于提供火线数据的火线; 提供选择数据的选择行; 联接到火线的点火单元; 耦合到火线的EPROM单元; 耦合到选择线的选择器单元，点火单元和EPROM单元; 以及数据切换电路，用于向点火单元或EPROM单元提供地址数据。 数据切换电路和选择器单元选择性地使得能够根据选择线上的选择数据的状态和来自数据切换电路的地址数据将火线数据从火线传送到点火单元或EPROM单元 。
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