公开(公告)号：US6096588A

公开(公告)日：2000-08-01

申请号：US969426

申请日：1997-11-01

申请人： Donald A. Draper

发明人： Donald A. Draper

IPC分类号： H01L21/336 ,  H01L29/10 ,  H01L29/78

CPC分类号： H01L29/6659 ,  H01L29/1045 ,  H01L29/66659 ,  H01L29/7833 ,  H01L29/7835

摘要： A method of making an IGFET with a selected threshold voltage is disclosed. The method includes providing a semiconductor substrate with a device region that includes a source region, a drain region and a channel region therebetween, forming a gate over the channel region, introducing a threshold adjust dopant into the channel region after forming the gate without transferring essentially any of the threshold adjust dopant through the gate, thereby adjusting a threshold voltage of the IGFET, and forming a source in the source region and a drain in the drain region. Preferably, the threshold adjust dopant is introduced by implanting the threshold adjust dopant into the source region and diffusing the threshold adjust dopant from the source region into the channel region before providing any source/drain doping. The invention is well-suited for adjusting the threshold voltage, and therefore the drive current, leakage current and speed, of selected IGFETs, so that the fastest IGFETs with the highest leakage currents can be placed in critical speed paths such the tag to an instruction cache.

摘要翻译： 公开了一种制造具有选定阈值电压的IGFET的方法。 该方法包括提供具有器件区域的器件区域，该器件区域包括源极区域，漏极区域和它们之间的沟道区域，在沟道区域上形成栅极，在形成栅极之后将阈值调整掺杂剂引入沟道区域而不转移 任何阈值通过栅极调整掺杂剂，从而调节IGFET的阈值电压，以及在源极区域和漏极区域中的漏极形成源极。 优选地，通过将​​阈值调整掺杂剂注入到源极区域中并且在提供任何源极/漏极掺杂之前将阈值调节掺杂剂从源极区扩散到沟道区域中来引入阈值调整掺杂剂。 本发明非常适合于调整所选IGFET的阈值电压，因此调节驱动电流，漏电流和速度，使得具有最高漏电流的最快IGFET可以放置在诸如标签到指令的临界速度路径 缓存。

公开(公告)号：US6127880A

公开(公告)日：2000-10-03

申请号：US391147

申请日：1999-09-07

申请人： John Christian Holst ,  Donald A. Draper

发明人： John Christian Holst ,  Donald A. Draper

IPC分类号： G11C29/02 ,  H03B5/04 ,  H03L7/08 ,  H03L7/099 ,  H01J19/82

CPC分类号： G11C29/021 ,  G11C29/02 ,  G11C29/50012 ,  H03B5/04 ,  H03L7/08 ,  H03L7/0995

摘要： An active power supply filter effectively eliminates power supply noise using a resistive element and a capacitive element coupled at a node, and a switch with a control terminal controlled by the node. The active power supply filter is suitable for high frequency operation of a voltage-controlled oscillator (VCO) in a phase-locked loop (PLL) of a high-speed microprocessor. The active power supply filter removes VCO noise that would otherwise create jitter that reduces the effective clock cycle of the microprocessor. The active power supply filter is similarly useful in applications other than VCOs, PLLs, and microprocessors in which removal of substantial amounts of noise from the power supply is useful.

摘要翻译： 有源电源滤波器使用电阻元件和耦合在节点处的电容元件以及由节点控制的具有控制端的开关有效地消除了电源噪声。 有源电源滤波器适用于高速微处理器的锁相环（PLL）中的压控振荡器（VCO）的高频工作。 有源电源滤波器消除了VCO噪声，否则会产生抖动，从而降低微处理器的有效时钟周期。 有源电源滤波器在除VCO，PLL和微处理器之外的应用中同样有用，其中从电源中去除大量噪声是有用的。

公开(公告)号：US6033964A

公开(公告)日：2000-03-07

申请号：US109574

申请日：1998-07-02

申请人： Donald A. Draper

发明人： Donald A. Draper

IPC分类号： H01L27/02 ,  H01L27/092 ,  H01L21/8228

CPC分类号： H01L27/0203 ,  H01L27/0922

摘要： Generally, decreasing the length of the channel in a CMOS transistor increases the speed of the transistor. However, the degree that the channel can be minimized is limited due to Hot Carrier Injection ("HCI"), which is related to the drain to source voltage and channel length. The present invention increases the speed of a circuit by decreasing the channel length of subset of transistors in the circuit. The subset is chosen by identifying instances where more than one transistor in series is used to discharge a capacitance. Those transistors are subject to lower drain to source voltages; therefore, the channel length can be reduced without suffering from the effects of HCI.

摘要翻译： 通常，减小CMOS晶体管中沟道的长度会增加晶体管的速度。 然而，由于与源极电压和沟道长度有关的热载流子注入（“HCI”），通道可以最小化的程度受到限制。 本发明通过减小电路中晶体管子集的沟道长度来增加电路的速度。 通过识别使用多于一个串联晶体管来放电电容的情况来选择该子集。 那些晶体管的源极电压降低; 因此，可以减少通道长度，而不会受到HCI的影响。

公开(公告)号：US5925913A

公开(公告)日：1999-07-20

申请号：US918062

申请日：1997-08-25

申请人： Donald A. Draper

发明人： Donald A. Draper

IPC分类号： H01L27/02 ,  H01L27/092 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113

CPC分类号： H01L27/0203 ,  H01L27/0922

摘要： Generally, decreasing the length of the channel in a CMOS transistor increases the speed of the transistor. However, the degree that the channel can be minimized is limited due to Hot Carrier Injection ("HCI"), which is related to the drain to source voltage and channel length. The present invention increases the speed of a circuit by decreasing the channel length of subset of transistors in the circuit. The subset is chosen by identifying instances where more than one transistor in series is used to discharge a capacitance. Those transistors are subject to lower drain to source voltages; therefore, the channel length can be reduced without suffering from the effects of HCI.

公开(公告)号：US07346819B2

公开(公告)日：2008-03-18

申请号：US10976549

申请日：2004-10-29

申请人： Akash Bansal ,  Michael Sobelman ,  Simon Li ,  Donald A. Draper

发明人： Akash Bansal ,  Michael Sobelman ,  Simon Li ,  Donald A. Draper

IPC分类号： G01R31/28

CPC分类号： G01R31/31716 ,  G01R31/31703 ,  G01R31/31813 ,  G06F11/221

摘要： An integrated circuit device having a test sequence generator, first and second transceivers and a test sequence analyzer. The test sequence generator generates a test data sequence in response to a test mode selection. The first transceiver receives the test data sequence from the test sequence generator and is configured in a loopback mode to transmit and receive the test data sequence. The second transceiver receives the test data sequence received by the first transceiver and is configured in a loopback mode to transmit and receive the test data sequence. The test sequence analyzer determines whether the test data sequence received by the second transceiver matches the test data sequence generated by the test sequence generator.

摘要翻译： 具有测试序列发生器，第一和第二收发器以及测试序列分析器的集成电路器件。 测试序列发生器响应于测试模式选择产生测试数据序列。 第一收发器从测试序列发生器接收测试数据序列，并且被配置为回送模式以发送和接收测试数据序列。 第二收发器接收由第一收发器接收的测试数据序列，并被配置为环回模式以发送和接收测试数据序列。 测试序列分析器确定由第二收发器接收的测试数据序列是否与由测试序列发生器产生的测试数据序列匹配。

公开(公告)号：US06285052B1

公开(公告)日：2001-09-04

申请号：US08939017

申请日：1997-09-26

申请人： Donald A. Draper

发明人： Donald A. Draper

IPC分类号： H01L27108

CPC分类号： H01L29/94 ,  H01L27/0811

摘要： An integrated capacitor includes a device region of first conductivity type in a semiconductor substrate, a source/drain region of the first conductivity type in the device region with a higher doping concentration than the device region, a gate insulator over the device region, and a gate over the gate insulator. A first terminal is coupled to the source/drain region, and a second terminal is coupled to the gate. Advantageously, the integrated capacitor is operated with the device region beneath the gate driven into accumulation instead of inversion. This allows a lower voltage to be applied to the gate, which allows for a thinner gate insulator to be used resulting in higher capacitance per unit area. Furthermore, since the device region is much thicker and more highly conductive than an inversion layer, the integrated capacitor has greatly improved frequency response.

摘要翻译： 集成电容器包括在半导体衬底中的第一导电类型的器件区域，在器件区域中具有比器件区域高的掺杂浓度的第一导电类型的源极/漏极区域，器件区域上的栅极绝缘体，以及 栅极绝缘体上的栅极。 第一端子耦合到源极/漏极区域，并且第二端子耦合到栅极。 有利的是，集成电容器被操作，栅极下面的器件区域被驱动成积累而不是反转。 这允许将更低的电压施加到栅极，这允许使用更薄的栅绝缘体，导致每单位面积的更高的电容。 此外，由于器件区域比反转层厚得多且更高导电性，所以集成电容器的频率响应大大提高。