公开(公告)号：US08508503B2

公开(公告)日：2013-08-13

申请号：US13072803

申请日：2011-03-28

申请人： Jian-Hong Lin ,  Wen-Rei Guo ,  Ching-Hua Chuang

发明人： Jian-Hong Lin ,  Wen-Rei Guo ,  Ching-Hua Chuang

IPC分类号： G06F3/041

CPC分类号： G06F3/041 ,  G02F1/13338 ,  G06F3/0412 ,  G06F3/0418

摘要： A touch panel includes a touch sensor, a liquid crystal panel, and a reverse circuit. The reverse circuit receives common voltage ripples of the liquid crystal panel, and outputs reversed common voltage ripples after reversing the common voltage ripples. After the touch sensor receives the reversed common voltage ripples, the touch sensor outputs a sensing signal according to the reversed common voltage ripples.

摘要翻译： 触摸面板包括触摸传感器，液晶面板和反向电路。 反向电路接收液晶面板的公共电压波纹，并在反转公共电压纹波之后输出反向的公共电压纹波。 在触摸传感器接收到反向的公共电压波纹之后，触摸传感器根据反向的公共电压纹波输出感测信号。

公开(公告)号：US20120209406A1

公开(公告)日：2012-08-16

申请号：US13396491

申请日：2012-02-14

申请人： Jian-Yu Chen ,  Chia-Chung WU ,  Wun-Ya Gao ,  Jian-Hong Lin

发明人： Jian-Yu Chen ,  Chia-Chung WU ,  Wun-Ya Gao ,  Jian-Hong Lin

IPC分类号： A61F2/66

CPC分类号： A61F2/66 ,  A61F2002/5003 ,  A61F2002/5007 ,  A61F2002/6621 ,  A61F2002/6664

摘要： A foot plate device is connected to a prosthetic lower leg of an artificial foot, and includes a flexible foot plate. The foot plate has a front plate section, an inclined intermediate plate section extending rearwardly and upwardly from a rear end of the front plate section, and a rear plate section extending rearwardly from a rear end of the intermediate plate section and generally parallel to the front plate section. The front plate section has at least one open-ended slot formed vertically therethrough and extending across the front plate section along a longitudinal direction of the foot plate, so as to divide the front plate section into two force-receiving plate portions. The rear plate section is connected with the prosthetic lower leg.

摘要翻译： 脚板装置连接到人造脚的假肢小腿，并且包括柔性脚板。 脚踏板具有前板部分，从前板部分的后端向后并向上延伸的倾斜中间板部分，以及从中间板部分的后端向后延伸并且大致平行于前部的后板部分 板段。 前板部分具有至少一个垂直穿过的开口槽，沿着脚板的纵向方向延伸穿过前板部分，以将前板部分分成两个受力板部分。 后板部分与假肢小腿连接。

公开(公告)号：US08242576B2

公开(公告)日：2012-08-14

申请号：US11186581

申请日：2005-07-21

申请人： Jian-Hong Lin ,  Kang-Cheng Lin ,  Tzu-Li Lee

发明人： Jian-Hong Lin ,  Kang-Cheng Lin ,  Tzu-Li Lee

IPC分类号： H01L23/52

CPC分类号： H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor structure prevents energy that is used to blow a fuse from causing damage. The semiconductor structure includes a device, guard ring, and at least one protection layer. The device is constructed on the semiconductor substrate underneath the fuse. The seal ring, which surrounds the fuse, is constructed on at least one metal layer between the device and the fuse for confining the energy therein. The protection layer is formed within the seal ring, on at least one metal layer between the device and the fuse for shielding the device from being directly exposed to the energy.

摘要翻译： 半导体结构防止用于熔断保险丝的能量造成损坏。 半导体结构包括器件，保护环和至少一个保护层。 该器件构造在保险丝下方的半导体衬底上。 围绕熔丝的密封环构造在设备和保险丝之间的至少一个金属层上，以将能量限制在其中。 保护层形成在密封环内，在设备和保险丝之间的至少一个金属层上，用于屏蔽器件不会直接暴露于能量。

公开(公告)号：US08068577B2

公开(公告)日：2011-11-29

申请号：US12565226

申请日：2009-09-23

申请人： Yi-Suei Liao ,  Jian-Hong Lin

发明人： Yi-Suei Liao ,  Jian-Hong Lin

IPC分类号： G11C19/00

CPC分类号： G11C19/28 ,  G09G2300/0408 ,  G09G2300/0417 ,  G09G2310/0286 ,  G09G2320/043 ,  G11C19/184

摘要： The present invention relates to a pull-down control circuit and a shift register of using same. In one embodiment, the pull-down control circuit includes a release circuit and four transistors T4, T5, T6 and T7 electrically coupled to each other. The release circuit is adapted for causing the transistor T5 to be turned on and off alternately, thereby substantially reducing the stress thereon, improving the reliability and prolonging the lifetime of the shift register.

摘要翻译： 本发明涉及一种下拉控制电路和使用它的移位寄存器。 在一个实施例中，下拉控制电路包括释放电路和彼此电耦合的四个晶体管T4，T5，T6和T7。 释放电路适于使晶体管T5交替地导通和截止，从而大大降低其上的应力，提高可靠性并延长移位寄存器的寿命。

公开(公告)号：US07667289B2

公开(公告)日：2010-02-23

申请号：US11091508

申请日：2005-03-29

申请人： Jian-Hong Lin ,  Kang-Cheng Lin

发明人： Jian-Hong Lin ,  Kang-Cheng Lin

IPC分类号： H01L21/326

CPC分类号： H01L23/5258 ,  H01L2924/0002 ,  H01L2924/00

摘要： A laser fuse structure for a semiconductor device, the laser fuse structure having an array of laser fuses wherein one or more of the fuses in the array have a tortuous fuse line extending between first and second connectors that connect the fuse to an underlying circuit area.

摘要翻译： 一种用于半导体器件的激光熔丝结构，所述激光熔丝结构具有激光熔丝阵列，其中阵列中的一个或多个熔丝具有在将熔丝连接到下面的电路区域的第一和第二连接器之间延伸的曲折熔丝。

公开(公告)号：US20080251923A1

公开(公告)日：2008-10-16

申请号：US11786076

申请日：2007-04-10

申请人： Chien-Jung Wang ,  Jian-Hong Lin

发明人： Chien-Jung Wang ,  Jian-Hong Lin

IPC分类号： H01L23/522 ,  H01L29/06

CPC分类号： H01L23/585 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor chip includes a seal ring adjacent to edges of the semiconductor chip; an opening extending from a top surface to a bottom surface of the seal ring, wherein the opening has a first end on an outer side of the seal ring and a second end on an inner side of the seal ring; and a moisture barrier having a sidewall parallel to a nearest side of the seal ring, wherein the moisture barrier is adjacent the seal ring and has a portion facing the opening.

摘要翻译： 半导体芯片包括与半导体芯片的边缘相邻的密封环; 从所述密封环的顶表面延伸到底表面的开口，其中所述开口具有在所述密封环的外侧上的第一端和所述密封环的内侧上的第二端; 以及具有平行于所述密封环的最近侧的侧壁的防潮屏障，其中所述防潮层邻近所述密封环并且具有面向所述开口的部分。

公开(公告)号：US20070015365A1

公开(公告)日：2007-01-18

申请号：US11181433

申请日：2005-07-14

申请人： Hsien-Wei Chen ,  Hao-Yi Tsai ,  Hsueh-Chung Chen ,  Shin-Puu Jeng ,  Jian-Hong Lin ,  Chih-Tao Lin ,  Shih-Hsun Hsu

发明人： Hsien-Wei Chen ,  Hao-Yi Tsai ,  Hsueh-Chung Chen ,  Shin-Puu Jeng ,  Jian-Hong Lin ,  Chih-Tao Lin ,  Shih-Hsun Hsu

IPC分类号： H01L21/461

CPC分类号： H01L21/3212 ,  H01L21/31053

摘要： In one embodiment, the disclosure relates to a method and apparatus for inserting dummy patterns in sparsely populated portions of a metal layer. The dummy pattern counters the effects of variations of pattern density in a semiconductor layout which can cause uneven post-polish film thickness. An algorithm according to one embodiment of the disclosure determines the size and location of the dummy patterns based on the patterns in the metal layer by first surrounding the metal structure with small dummy pattern and then filling any remaining voids with large dummy patterns.

公开(公告)号：US20060099787A1

公开(公告)日：2006-05-11

申请号：US10983681

申请日：2004-11-09

申请人： Jian-Hong Lin ,  Ying-Jen Kao ,  Jye-Yen Cheng

发明人： Jian-Hong Lin ,  Ying-Jen Kao ,  Jye-Yen Cheng

IPC分类号： H01L21/44

CPC分类号： H01L21/76808

摘要： Methods for forming openings in damascene structures, such as dual damascene structures are provided, using plug materials having varied etching rates. In one embodiment, a semiconductor substrate is provided with a low-k material layer formed thereabove, the low-k material layer having an upper surface and at least one via opening formed therethrough. A first plug material layer is formed over the low-k material layer and filled in the via opening, the first plug material layer having a first etching rate. The first plug material layer is etched back to form a first plug partially filling the via opening. A second plug material layer is formed over the low-k material layer and the first plug. The second plug material layer is etched back to form a second plug partially below the upper surface of the low-k material layer, the second plug material layer having a second etching rate higher than the first etching rate.

公开(公告)号：US20130063175A1

公开(公告)日：2013-03-14

申请号：US13231812

申请日：2011-09-13

申请人： Bi-Ling Lin ,  Jian-Hong Lin ,  Ming-Hong Hsieh ,  Lee-Der Chen ,  Jiaw-Ren Shih ,  Chwei-Ching Chiu

发明人： Bi-Ling Lin ,  Jian-Hong Lin ,  Ming-Hong Hsieh ,  Lee-Der Chen ,  Jiaw-Ren Shih ,  Chwei-Ching Chiu

IPC分类号： G01R31/26 ,  H01L23/538 ,  H01L23/522

CPC分类号： H01L23/5256 ,  G01R31/2853 ,  G01R31/2858 ,  G01R31/2884 ,  H01L22/34 ,  H01L23/522 ,  H01L2924/0002 ,  H01L2924/00

摘要： Semiconductor device components and methods are disclosed. In one embodiment, a semiconductor device component includes a conductive segment having a first surface, a second surface opposite the first surface, a first end, and a second end opposite the first end. A first via is coupled to the second surface of the conductive segment at the first end. A second via is coupled to the first surface of the conductive segment at the second end, and a third via is coupled to the second surface of the conductive segment at the second end.

摘要翻译： 公开了半导体器件组件和方法。 在一个实施例中，半导体器件部件包括具有第一表面，与第一表面相对的第二表面，第一端和与第一端相对的第二端的导电段。 第一通孔在第一端耦合到导电段的第二表面。 第二通孔在第二端处耦合到导电段的第一表面，并且第三通孔在第二端耦合到导电段的第二表面。

公开(公告)号：US08379365B2

公开(公告)日：2013-02-19

申请号：US12768001

申请日：2010-04-27

申请人： Chin-Shan Wang ,  Jian-Hong Lin ,  Chien-Jung Wang

发明人： Chin-Shan Wang ,  Jian-Hong Lin ,  Chien-Jung Wang

IPC分类号： H01G4/005 ,  H01G4/06

CPC分类号： H01L29/92 ,  H01G4/012 ,  H01G4/228 ,  H01G4/30 ,  H01G4/33 ,  H01L23/5222 ,  H01L28/60 ,  H01L28/86 ,  H01L28/90 ,  H01L2924/0002 ,  H01L2924/00

摘要： A capacitor includes the first electrode including the first conductive lines and vias. The first conductive lines on the same layer are parallel to each other and connected to a first periphery conductive line. The first conductor lines are aligned in adjacent layers and are coupled to each other by the vias. The capacitor further includes a second electrode aligned opposite to the first electrode including second conductive lines and vias. The second conductive lines on the same layer are parallel to each other and connected to a second periphery conductive line. The second conductor lines are aligned in adjacent layers and are coupled to each other by the vias. The capacitor further includes oxide layers formed between the first electrode and the second electrode. The vias have rectangular (slot) shapes on a layout. In one embodiment, the conductive lines and vias are metal, e.g. copper, aluminum, or tungsten.

摘要翻译： 电容器包括包括第一导电线和通孔的第一电极。 同一层上的第一导电线彼此平行并且连接到第一周边导电线。 第一导体线在相邻层中对准并且通过通孔彼此耦合。 电容器还包括与包括第二导电线和通孔的第一电极对准的第二电极。 相同层上的第二导电线彼此平行并连接到第二外围导电线。 第二导体线在相邻层中对准并且通过通孔彼此耦合。 电容器还包括形成在第一电极和第二电极之间的氧化物层。 通孔在布局上具有矩形（槽）形状。 在一个实施例中，导电线和通孔是金属，例如。 铜，铝或钨。