Electrical circuit for measuring times and method for measuring times
    11.
    发明授权
    Electrical circuit for measuring times and method for measuring times 有权
    测量时间的电路和测量时间的方法

    公开(公告)号:US07653170B2

    公开(公告)日:2010-01-26

    申请号:US11440481

    申请日:2006-05-25

    IPC分类号: G04F10/04

    摘要: An electrical circuit used for measuring times is disclosed. In one embodiment, the electrical circuit has a counter, a decoder and a multiplicity of time trap elements. At least the counter and the time trap elements are located together on an integrated semiconductor component. Each time trap element has a data input, a clock input, a delay output and a output port. The time trap element contains a delay element and a flip flop. The delay element outputs a signal change at the data input with a time delay at the delay output. The flip flop has a data input, a clock input and an output port, the data inputs, the clock inputs and the output ports of the flip flop and of the time trap element being connected to one another. The time trap elements are connected as ring oscillator.

    摘要翻译: 公开了一种用于测量时间的电路。 在一个实施例中,电路具有计数器,解码器和多个时间陷波元件。 至少计数器和时间陷阱元件一起位于集成半导体部件上。 每次陷阱元件都具有数据输入,时钟输入,延迟输出和输出端口。 时间陷阱元件包含延迟元件和触发器。 延迟元件在延迟输出端以时间延迟输出数据输入端的信号变化。 触发器具有数据输入,时钟输入和输出端口,触发器的数据输入,时钟输入和输出端口以及时间陷阱元件彼此连接。 时间陷阱元件连接为环形振荡器。

    Device and method for testing integrated circuits
    12.
    发明授权
    Device and method for testing integrated circuits 有权
    集成电路测试装置和方法

    公开(公告)号:US07400995B2

    公开(公告)日:2008-07-15

    申请号:US10566461

    申请日:2004-07-08

    IPC分类号: G06F19/00

    CPC分类号: G01R31/2839 G01R35/005

    摘要: A test device and method is disclosed. In one embodiment, the test device includes a precision signal generator for generating a test signal, which generator is connected via a respective connecting line to a respective input contact intended for connection to an input of an integrated circuit, and at least one reference signal generator for generating a reference signal. Furthermore, at least one comparator unit is provided for a respective input contact said comparator unit being able to be operated in a test mode. In the test mode, the test signal is compared with the reference signal. The precision signal generator is turned off by the comparator unit if the test signal exceeds or falls below the reference signal.

    摘要翻译: 公开了一种测试装置和方法。 在一个实施例中,测试装置包括用于产生测试信号的精密信号发生器,该发生器经由相应的连接线连接到用于连接到集成电路的输入的相应输入触点,以及至少一个参考信号发生器 用于产生参考信号。 此外,为相应的输入触点提供至少一个比较器单元,所述比较器单元能够在测试模式下操作。 在测试模式下,将测试信号与参考信号进行比较。 如果测试信号超过或低于参考信号,则比较器单元关闭精密信号发生器。

    Measuring device and method for measuring relative phase shifts of digital signals
    13.
    发明申请
    Measuring device and method for measuring relative phase shifts of digital signals 有权
    用于测量数字信号相对相移的测量装置和方法

    公开(公告)号:US20070226602A1

    公开(公告)日:2007-09-27

    申请号:US11530257

    申请日:2006-09-08

    IPC分类号: G06F11/00

    摘要: M periods of the test signal and of the reference signal are received. The periods of the test signal and of the reference signal are in each case Tsig long. The test signal is sampled with N sampled values at a sampling frequency fs=1/Ts. Also, N*Ts=M*Tsig, where N>M. The sampled values are numbered progressively by n, for which 0≦n ≦N−1. The sampled values have a defined relative phase shift with respect to the reference signal. The phase shift Tφ is calculated by ∑ i = 0 M - 1 ⁢   ⁢ Idx ⁡ ( i ) + K , K being a constant and Idx(i) corresponding to the number n which is either the first sampled value after a test signal zero crossing during the reference signal's ith period or the last sampled value before a test signal zero crossing during the reference signal's ith period. Either only rising or only falling zero crossings are taken into account.

    摘要翻译: 接收测试信号和参考信号的M个周期。 在每种情况下,测试信号和参考信号的周期都是长的。 测试信号以采样频率f N 1 = 1 / T S N的采样值采样。 此外,N * T S = M * T S,其中N> M。 采样值逐渐被n编号,0 <= n <= N-1。 采样值相对于参考信号具有限定的相对相移。 相位偏移T < MUNDEROVER> Σ i = 0 MI> - 1 > Idx i MO> + K K为常数,Idx(i)对应于在参考信号的第i个时段期间的测试信号过零之后的第一采样值或最后采样值的数量n 在参考信号的第i个周期之前的测试信号过零之前。 只考虑上升或下降的零交叉点。

      Electrical circuit and method for testing electronic component
      14.
      发明申请
      Electrical circuit and method for testing electronic component 有权
      电子元件电路及测试方法

      公开(公告)号:US20070063723A1

      公开(公告)日:2007-03-22

      申请号:US10564650

      申请日:2004-06-04

      IPC分类号: G01R31/26

      摘要: The electrical test circuit (5) comprises a first input (51) for receiving a test signal of an integrated circuit (4), a second input (52) for receiving a control signal and a third input (53) for receiving a normalized reference signal, particularly one that is formed to be synchronous with the test signal. Using a control device (55) of the electrical test circuit (5), the deviation and/or the amplitude and/or the phase of the reference signal and/or of the test signal can be varied. A measuring device (56) generates, by subtracting the reference signal from the test signal, a difference signal which is output via an output (54).

      摘要翻译: 电测试电路(5)包括用于接收集成电路(4)的测试信号的第一输入端(51),用于接收控制信号的第二输入端(52)和用于接收标准化参考信号的第三输入端 信号,特别是形成为与测试信号同步的信号。 使用电测试电路(5)的控制装置(55),可以改变参考信号和/或测试信号的偏差和/或幅度和/或相位。 测量装置(56)通过从测试信号中减去参考信号产生通过输出(54)输出的差分信号。

      Measuring device and method for measuring relative phase shifts of digital signals
      15.
      发明授权
      Measuring device and method for measuring relative phase shifts of digital signals 有权
      用于测量数字信号相对相移的测量装置和方法

      公开(公告)号:US07945406B2

      公开(公告)日:2011-05-17

      申请号:US11530257

      申请日:2006-09-08

      IPC分类号: G01R25/00 G01R29/26

      摘要: M periods of the test signal and of the reference signal are received. The periods of the test signal and of the reference signal are in each case Tsig long. The test signal is sampled with N sampled values at a sampling frequency fs=1/Ts. Also, N*Ts=M*Tsig, where N>M. The sampled values are numbered progressively by n, for which 0≦n ≦N−1. The sampled values have a defined relative phase shift with respect to the reference signal. The phase shift Tφ is calculated by ∑ i = 0 M - 1 ⁢ ⁢ Idx ⁡ ( i ) + K , K being a constant and Idx(i) corresponding to the number n which is either the first sampled value after a test signal zero crossing during the reference signal's ith period or the last sampled value before a test signal zero crossing during the reference signal's ith period. Either only rising or only falling zero crossings are taken into account.

      摘要翻译: 接收测试信号和参考信号的M个周期。 测试信号和参考信号的周期在每种情况下都是长度。 以采样频率fs = 1 / Ts的N个采样值对测试信号进行采样。 另外,N * Ts = M * Tsig,其中N> M。 采样值逐渐被n编号,其中0&nlE; n&nlE; N-1。 采样值相对于参考信号具有限定的相对相移。 相移T&phgr 通过Σi = 0 M -1优先Idx⁡(i)+ K,K是常数,Idx(i)对应于在参考期间测试信号过零之后的第一采样值的数量n 在参考信号第i个周期之前,测试信号过零之前的信号第i个周期或最后一个采样值。 只考虑上升或下降的零交叉点。

      Electrical circuit and method for testing electronic component
      16.
      发明授权
      Electrical circuit and method for testing electronic component 有权
      电子元件电路及测试方法

      公开(公告)号:US07912667B2

      公开(公告)日:2011-03-22

      申请号:US10564650

      申请日:2004-06-04

      IPC分类号: G01R31/00 G01R31/14

      摘要: An electrical test circuit is disclosed. In one embodiment, the electrical test circuit includes a first input for receiving a test signal of an integrated circuit, a second input for receiving a control signal and a third input for receiving a normalized reference signal, particularly one that is formed to be synchronous with the test signal. Using a control device of the electrical test circuit, the deviation and/or the amplitude and/or the phase of the reference signal and/or of the test signal can be varied. A measuring device generates, by subtracting the reference signal from the test signal, a difference signal which is output via an output.

      摘要翻译: 公开了一种电测试电路。 在一个实施例中,电测试电路包括用于接收集成电路的测试信号的第一输入端,用于接收控制信号的第二输入端和用于接收归一化参考信号的第三输入端,特别是形成为与 测试信号。 使用电测试电路的控制装置,可以改变参考信号和/或测试信号的偏差和/或幅度和/或相位。 测量装置通过从测试信号中减去参考信号来产生通过输出输出的差分信号。

      Electrical circuit and method for testing integrated circuits
      18.
      发明授权
      Electrical circuit and method for testing integrated circuits 有权
      电路和集成电路测试方法

      公开(公告)号:US07256602B2

      公开(公告)日:2007-08-14

      申请号:US10937116

      申请日:2004-09-09

      IPC分类号: G01R31/26

      CPC分类号: G01R31/31932

      摘要: An electrical circuit including a test circuit and a method of testing electrical circuits is disclosed. In one embodiment, the circuit includes a electrical short-circuit protective circuit according to the invention for protecting an input contact against short-circuit having an input which is intended for connection to a signal generator, and an output which is intended for connection to a input contact. The input contact can be decoupled from the region lying upstream of the input of the electrical short-circuit protective circuit by the electrical short-circuit protective circuit.

      摘要翻译: 公开了一种包括测试电路和测试电路的方法的电路。 在一个实施例中,电路包括根据本发明的电短路保护电路,用于保护输入触点免于具有用于连接到信号发生器的输入的短路,以及用于连接到 输入接点。 输入触点可以通过电气短路保护电路从位于电气短路保护电路的输入上游的区域去耦。

      Device and method for measuring jitter
      20.
      发明申请
      Device and method for measuring jitter 有权
      用于测量抖动的装置和方法

      公开(公告)号:US20060291548A1

      公开(公告)日:2006-12-28

      申请号:US11440441

      申请日:2006-05-25

      IPC分类号: H04B3/46 H04B17/00

      摘要: A test device contains a data pattern generator for providing a delta-sigma-modulated data stream sampled with a sampling frequency fs at its output. A phase modulator generates a test clock subjected to jitter and having the clock frequency f1 at its output. The output of the data pattern generator is connected to a terminal for connection to a data input of a semiconductor component to be tested. The output of the phase modulator is connected to a terminal for connection to a clock input of a semiconductor component to be tested. An evaluation device determines the jitter parameters of the input sinusal at the input of the data device from the low-frequency component of the input sinusal. In this case, the low-frequency component contains only frequency components of frequencies which are less than half the sampling frequency fs/2.

      摘要翻译: 测试装置包含数据模式发生器,用于在其输出端提供以采样频率f S采样的Δ-Σ调制数据流。 相位调制器在其输出端产生经受抖动并具有时钟频率f 1> 1的测试时钟。 数据模式发生器的输出端连接到用于连接到要测试的半导体元件的数据输入端的端子。 相位调制器的输出连接到用于连接到要测试的半导体部件的时钟输入的端子。 评估装置从输入的正弦的低频分量确定数据装置的输入处的输入正弦的抖动参数。 在这种情况下,低频分量仅包含频率小于采样频率f 2/2的一半的频率分量。