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公开(公告)号：US10012957B2
公开(公告)日：2018-07-03
申请号：US15544773
申请日：2016-01-07
申请人： RIKEN
CPC分类号： G04F10/06 , G04F10/04 , H03K5/135 , H03K21/026
摘要： A time measurement device measures a time interval between input timings of first and second pulsed target signals. The device includes: a processor; a number-of-periods detector that detects, by using a clock signal with a predetermined clock frequency and a predetermined clock period, the time interval in units of the clock period; and a phase detection unit including a band-pass filter. The band-pass filter receives at least one of the first and second target signals as a filtering target signal and extracts a signal component of the clock frequency from the filtering target signal. The phase detection unit detects a phase difference between the extracted signal and the clock signal. The processor derives, by using a result detected by the number-of-periods detector and the detected phase difference, the time interval at a resolution finer than the clock period.
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公开(公告)号：US20180026615A1
公开(公告)日：2018-01-25
申请号：US15653826
申请日：2017-07-19
发明人： Hideo HANEDA
摘要： A comparator includes a first voltage-time conversion circuit, a second voltage-time conversion circuit, and a determination circuit. A first delay unit includes a first falling edge delay circuit that delays a falling edge based on a first input signal, a first rising edge delay circuit that delays a rising edge based on a second input signal, and a first output circuit. A second delay unit includes a second falling edge delay circuit that delays a falling edge based on the second input signal, a second rising edge delay circuit that delays a rising edge based on the first input signal, and a second output circuit.
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公开(公告)号：US20170371301A1
公开(公告)日：2017-12-28
申请号：US15544773
申请日：2016-01-07
申请人： RIKEN
CPC分类号： G04F10/06 , G04F10/04 , H03K5/135 , H03K21/026
摘要： A time measurement device measures a time interval between input timings of first and second pulsed target signals. The device includes: a processor; a number-of-periods detector that detects, by using a clock signal with a predetermined clock frequency and a predetermined clock period, the time interval in units of the clock period; and a phase detection unit including a band-pass filter. The band-pass filter receives at least one of the first and second target signals as a filtering target signal and extracts a signal component of the clock frequency from the filtering target signal. The phase detection unit detects a phase difference between the extracted signal and the clock signal. The processor derives, by using a result detected by the number-of-periods detector and the detected phase difference, the time interval at a resolution finer than the clock period.
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公开(公告)号：US09118332B2
公开(公告)日：2015-08-25
申请号：US13818381
申请日：2011-08-03
申请人： Lucien Garcia , Jérôme Hou
发明人： Lucien Garcia , Jérôme Hou
CPC分类号： H03K23/00 , G04F10/04 , H03K21/023 , H03K21/40
摘要： A method for measuring a period of time between a first event and a second event via a hardware counter 2 and of a software counter 3. A digital counter 1 using such a method is also described.
摘要翻译： 一种用于经由硬件计数器2和软件计数器3测量第一事件和第二事件之间的时间段的方法。还描述了使用这种方法的数字计数器1。
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公开(公告)号：US20140254742A1
公开(公告)日：2014-09-11
申请号：US14281203
申请日：2014-05-19
申请人： FUJITSU LIMITED
发明人： Yoji SHIMAZAKI
CPC分类号： G04F10/04 , G01R31/2607 , G01R31/31725 , H01L27/092
摘要： An electronic circuit delay measurement device that includes: a delay section configured by a loop that reduces a pulse width of an input pulse by a specific reduction time and outputs the pulse, and that is connected such that the output pulse is employed as input; a pulse output section that is provided in the delay section loop, and that outputs a pulse of pulse width determined according to a delay time of an electronic circuit of a delay time measurement target when provided with a signal for starting a delay measurement, and that, for a pulse that has been input, outputs a pulse of pulse width determined according to the delay time of the electronic circuit; and a counting section that counts a pulse number of pulses output from the pulse output section.
摘要翻译： 一种电子电路延迟测量装置，包括：由循环构成的延迟部，其将输入脉冲的脉冲宽度减小特定的减少时间，并输出所述脉冲，并且将所述输出脉冲作为输入使用; 脉冲输出部，其设置在所述延迟部环路中，并且当设置有用于开始延迟测量的信号时，输出根据延迟时间测量对象的电子电路的延迟时间确定的脉冲宽度脉冲，并且 对于输入的脉冲，输出根据电子电路的延迟时间确定的脉冲宽度的脉冲; 以及计数部，其对从脉冲输出部输出的脉冲的脉冲数进行计数。
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公开(公告)号：US20130018631A1
公开(公告)日：2013-01-17
申请号：US13219764
申请日：2011-08-29
申请人： MING-HUNG CHOU , CHING-FENG HSIEH
发明人： MING-HUNG CHOU , CHING-FENG HSIEH
IPC分类号： G04F10/00
CPC分类号： G04F10/04 , G04F10/005
摘要： A method for measuring time includes setting a clock mask by a starting signal and an ending signal generated upon commencement of measurement and termination of measurement, respectively; obtaining a cycle number of a reference signal under the clock mask to calculate a preliminary time; correcting the preliminary time according to a plurality of phase shift signals generated based on the reference signal; and minimizing an error of the preliminary time by increasing the quantity of the phase shift signals. The method enhances the accuracy of the measured time, times up time measurement, and reduces the required circuit areas. A system for measuring time is further introduced for use with the method.
摘要翻译： 一种测量时间的方法包括：分别在开始测量和测量结束时产生的起始信号和结束信号来设置时钟屏蔽; 在时钟屏蔽下获得参考信号的周期数，以计算初步时间; 根据基于参考信号生成的多个相移信号来校正预备时间; 并通过增加相移信号的量来最小化预备时间的误差。 该方法提高了测量时间的精度，倍增了时间测量，并减少了所需的电路面积。 进一步介绍了一种用于测量时间的系统，用于该方法。
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公开(公告)号：US20130018630A1
公开(公告)日：2013-01-17
申请号：US13219794
申请日：2011-08-29
申请人： MING-HUNG CHOU , CHING-FENG HSIEH
发明人： MING-HUNG CHOU , CHING-FENG HSIEH
CPC分类号： G04F10/04 , G01S17/105 , G04F10/005
摘要： A method for measuring distance involves calculating a distance based on light speed and a time taken by an optical signal to travel to an object and return therefrom. The method includes calculating a time based on a cycle number of a reference signal under a clock mask synchronized with emission and reception of the optical signal; correcting the time according to a plurality of phase shift signals generated based on the reference signal; and minimizing an error of the time by increasing the quantity of the phase shift signals. The method enhances the accuracy of the measured time taken by an optical signal to travel to an object and return therefrom, speeds up measurement, and reduces the required circuit areas. A system for measuring distance is further introduced for use with the method.
摘要翻译： 用于测量距离的方法包括基于光速计算距离，以及计算由光信号行进到物体并返回的时间所花费的时间。 该方法包括基于与光信号的发射和接收同步的时钟掩码下的参考信号的周期数来计算时间; 根据基于参考信号生成的多个相移信号校正时间; 并且通过增加相移信号的量来最小化时间的误差。 该方法提高了光信号行进到物体并返回的测量时间的精度，加速了测量，并减少了所需的电路面积。 进一步引入用于测量距离的系统用于该方法。
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公开(公告)号：US08279111B2
公开(公告)日：2012-10-02
申请号：US12223923
申请日：2007-02-09
申请人： Bin Zhen , Huan-Bang Li , Ryuji Kohno
发明人： Bin Zhen , Huan-Bang Li , Ryuji Kohno
CPC分类号： G04F10/04 , G01S13/765
摘要： A high-precision distance measuring with a reduced error in a distance measuring system which calculates a distance from an arrival time of each pulse signal constituting a pulse sequence is provided. For an oscillator which generates pulse signals by counting the number of pulse signals constituting a received pulse sequence, a relative time difference between a transmitting device and a return device is acquired, a distance from the transmitting device to the return device is calculated, and the calculated distance is corrected based on the calculated relative time difference.
摘要翻译： 提供了一种距离测量系统中误差较小的高精度距离测量，其计算从构成脉冲序列的每个脉冲信号的到达时间的距离。 对于通过对构成接收到的脉冲序列的脉冲信号的数量进行计数来产生脉冲信号的振荡器，获取发送装置与返回装置之间的相对时间差，计算从发送装置到返回装置的距离， 基于所计算的相对时间差校正计算距离。
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公开(公告)号：US07649969B2
公开(公告)日：2010-01-19
申请号：US11339007
申请日：2006-01-25
申请人： Larry Alan Parker
发明人： Larry Alan Parker
IPC分类号： H03D3/24
摘要： A high-precision measurement of a duration is calculated from a coarse duration measurement and at least one trigger-phase measurement.
摘要翻译： 从粗略的持续时间测量和至少一个触发相位测量计算持续时间的高精度测量。
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10.发明授权Providing accurate time-based counters for scaling operating frequencies of microprocessors 失效提供精确的时间计数器来缩放微处理器的工作频率公开(公告)号：US07602874B2
公开(公告)日：2009-10-13
申请号：US11340449
申请日：2006-01-26
申请人： Rolf Hilgendorf , Jens Kuenzer , Cedric Lichtenau , Thomas Pflueger , Martin Recktenwald , Andreas Schmid
发明人： Rolf Hilgendorf , Jens Kuenzer , Cedric Lichtenau , Thomas Pflueger , Martin Recktenwald , Andreas Schmid
IPC分类号： H04L7/00
摘要： A mechanism provides accurate time-based counters for scaling operating frequencies of microprocessors. The mechanism makes use of a time-based counter circuit configuration in which a fixed frequency clock is derived from a PLL of the clock generation circuit of the microprocessor and is used to feed the external and internal timebase logic as well as a timebase accumulator counter. The timebase accumulator counter accumulates the tick events from the timebase logic between two core clocks. The accumulated value is transferred to the core clock domain on every clock edge of a scalable clock and the accumulator is then reset. Because the accumulated ticks are transferred to the core clock domain before the accumulator is reset, no ticks are ever lost using the circuitry of the illustrative embodiment.
摘要翻译： 一种机制提供了精确的基于时间的计数器来缩放微处理器的工作频率。 该机制利用基于时间的计数器电路配置，其中从微处理器的时钟产生电路的PLL导出固定频率时钟，并且用于馈送外部和内部时基逻辑以及时基累加器计数器。 时基累加器计数器从两个核心时钟之间的时基逻辑累加tick事件。 累加值在可伸缩时钟的每个时钟沿传输到核心时钟域，然后累加器复位。 因为在累加器复位之前累积的刻度被传送到核心时钟域，所以使用说明性实施例的电路不会丢失任何刻度。
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