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公开(公告)号:USD689449S1
公开(公告)日:2013-09-10
申请号:US29421406
申请日:2012-07-19
申请人: Mitsunobu Kimura , Tsukasa Doi , Yufeng Weng
设计人: Mitsunobu Kimura , Tsukasa Doi , Yufeng Weng
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公开(公告)号:US20110316906A1
公开(公告)日:2011-12-29
申请号:US13169462
申请日:2011-06-27
申请人: Hiroshi Taira , Kiichiro Takahashi , Akiko Maru , Tsukasa Doi
发明人: Hiroshi Taira , Kiichiro Takahashi , Akiko Maru , Tsukasa Doi
IPC分类号: B41J29/38
CPC分类号: B41J2/19 , B41J2/16532 , B41J29/02 , B41J29/38
摘要: An inkjet printing apparatus is provided that is capable of suppressing an increase in discarded ink by a restore operation of a restore unit. The apparatus is an inkjet printing apparatus that prints an image using a print head having a plurality of ejecting ports for ejecting ink and includes a restore unit that restores the ink ejection function of the print head, and a control unit that controls the restore unit so as to perform a restore operation depending on a parameter involving a growth rate of air bubbles existing inside the print head that is filled with ink.
摘要翻译: 提供一种喷墨打印装置,其能够通过恢复单元的恢复操作来抑制废墨的增加。 该装置是使用具有用于喷射墨水的多个喷射口的打印头来打印图像的喷墨打印装置,并且包括恢复打印头的喷墨功能的恢复单元和控制恢复单元的控制单元 以便根据包含存在于填充有墨的打印头内部的气泡的生长速率的参数执行恢复操作。
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公开(公告)号:US06187648B1
公开(公告)日:2001-02-13
申请号:US09270755
申请日:1999-03-17
申请人: Tsukasa Doi , Shigeo Ohnishi , Katsuji Iguchi , Naoyuki Shinmura
发明人: Tsukasa Doi , Shigeo Ohnishi , Katsuji Iguchi , Naoyuki Shinmura
IPC分类号: H01L2176
CPC分类号: H01L21/76224
摘要: A method of forming a device isolation region includes the steps of: forming a first dielectric film and an oxidation-resistant deposition film successively on a semiconductor substrate; forming a trench groove in the semiconductor substrate by successively processing the oxidation-resistant deposition film, the first dielectric film and the semiconductor substrate by anisotropic etching; forming a second dielectric film to cover at least an inner surface of the trench groove; depositing a third dielectric film in the trench groove so that the thickness of the third dielectric film buried in the trench groove is larger than a depth of the trench groove; planarizing a surface of the third dielectric film and an upper surface of the trench groove; and removing the oxidation-resistant deposition film and the first dielectric film to form the device isolation region, wherein a thermal treatment of the entire substrate is carried out to densify the third dielectric film and to oxidize an interface between the second dielectric film and the semiconductor substrate.
摘要翻译: 形成器件隔离区域的方法包括以下步骤:在半导体衬底上依次形成第一电介质膜和抗氧化淀积膜; 通过各向异性腐蚀对所述耐氧化沉积膜,所述第一电介质膜和所述半导体衬底进行连续处理,在所述半导体衬底中形成沟槽; 形成第二电介质膜以覆盖所述沟槽的至少内表面; 在沟槽中沉积第三电介质膜,使得埋在沟槽中的第三电介质膜的厚度大于沟槽的深度; 平面化第三电介质膜的表面和沟槽的上表面; 以及去除所述抗氧化沉积膜和所述第一电介质膜以形成所述器件隔离区域,其中执行整个衬底的热处理以使所述第三电介质膜致密化并氧化所述第二电介质膜和所述半导体之间的界面 基质。
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公开(公告)号:US5241205A
公开(公告)日:1993-08-31
申请号:US953197
申请日:1992-09-29
申请人: Shin Shimizu , Katsuji Iguchi , Seizo Kakimoto , Tsukasa Doi
发明人: Shin Shimizu , Katsuji Iguchi , Seizo Kakimoto , Tsukasa Doi
IPC分类号: H01L27/108
CPC分类号: H01L27/10808
摘要: A semiconductor memory device is provided which includes a plurality of memory cells, each of which includes: an active region having an MOS transistor formed in the surface portion of a semiconductor substrate; a gate electrode formed on the substrate for the MOS transistor so as to divide the active region into a source-side active region with a storage contact and a drain-side active region with a bit contact, the portion of the active region which is positioned under the gate electrode functioning as a channel region for the MOS transistor; a first impurity-implanted region formed in a portion of the source-side active region so as to overlap with part of the storage contact and the gate electrode, the portion of the source-side active region which overlaps with the first impurity-implanted region functioning as a source region for the MOS transistor; and a second impurity-implanted region formed in a portion of the drain-side active region so as to overlap with at least one part of the bit contact and the gate electrode, the portion of the drain-side active region which overlaps with the second impurity-implanted region functioning as a drain region for the MOS transistor.
摘要翻译: 提供了一种半导体存储器件,其包括多个存储单元,每个存储单元包括:形成在半导体衬底的表面部分中的MOS晶体管的有源区; 形成在所述MOS晶体管的所述基板上的栅电极,以将所述有源区域分为具有位触点的存储触点和漏极侧有源区域的源极侧有源区域,所述有源区域的所述部分位于 在作为MOS晶体管的沟道区域的栅电极下方; 形成在所述源侧有源区的一部分中以与所述存储接触和所述栅电极的一部分重叠的第一杂质注入区,所述源侧有源区的与所述第一杂质注入区重叠的部分 用作MOS晶体管的源极区域; 以及第二杂质注入区,形成在所述漏极侧有源区的一部分中以与所述位接触和所述栅电极的至少一部分重叠,所述漏极侧有源区的与所述第二杂质注入区重叠的部分 杂质注入区用作MOS晶体管的漏极区。
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15.
公开(公告)号:US08752930B2
公开(公告)日:2014-06-17
申请号:US13316856
申请日:2011-12-12
申请人: Tsukasa Doi , Kiichiro Takahashi , Akiko Maru , Takatoshi Nakano , Hiroshi Taira
发明人: Tsukasa Doi , Kiichiro Takahashi , Akiko Maru , Takatoshi Nakano , Hiroshi Taira
CPC分类号: B41J2/04563 , B41J2/0454 , B41J2/16508 , B41J2/16532 , B41J2/19
摘要: The amount of ink wastage is reduced, even in a case wherein a predetermined amount of air bubbles has grown in a print head at a specific internal temperature and the growth has been settled, and thereafter the temperature in the print head is increased. A suction-based recovery control method, for an ink jet printing apparatus that includes a print head, a temperature detection unit, and a suction-based recovery unit, comprising: a temperature detection step; a temperature judgment step for judging whether the internal temperature of the print head is higher than a reference temperature that is determined based on internal temperatures of the print head that were previously employed; and a suction-based recovery step for permitting the suction-based recovery unit when it is determined at the temperature judgment step that the internal temperature of the print head is higher by the predetermined number of degrees or greater.
摘要翻译: 即使在特定内部温度下在打印头中生长预定量的气泡并且生长已经稳定的情况下,甚至在打印头中的温度升高之后,也会降低油墨浪费的量。 一种用于包括打印头,温度检测单元和基于吸入的回收单元的喷墨打印设备的基于吸入的恢复控制方法,包括:温度检测步骤; 用于判断打印头的内部温度是否高于基于先前使用的打印头的内部温度确定的参考温度的温度判断步骤; 以及基于吸入的回收步骤,用于当在所述温度判断步骤中确定所述打印头的内部温度高预定数量以上时允许所述基于吸入的回收单元。
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公开(公告)号:USD689448S1
公开(公告)日:2013-09-10
申请号:US29421405
申请日:2012-07-19
申请人: Mitsunobu Kimura , Tsukasa Doi , Yufeng Weng
设计人: Mitsunobu Kimura , Tsukasa Doi , Yufeng Weng
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公开(公告)号:US5744394A
公开(公告)日:1998-04-28
申请号:US839025
申请日:1997-04-23
申请人: Katsuji Iguchi , Tsukasa Doi , Masanori Murakami , Takeo Oku
发明人: Katsuji Iguchi , Tsukasa Doi , Masanori Murakami , Takeo Oku
IPC分类号: H01L21/28 , H01L21/768 , H01L21/8246 , H01L23/522 , H01L27/112 , H01L29/45
CPC分类号: H01L27/11293 , H01L29/456
摘要: A semiconductor device comprises a plurality of transistors A semiconductor device comprising a plurality of transistors formed on a semiconductor substrate and a metal interconnection layer connected to at least one of the transistors, wherein the metal interconnection layer is composed of a single layer or multi layers, the single layer or at least one layer of the multi layers being formed of copper or a copper alloy, and is connected to at least one transistor wholly or partially through a barrier layer; and at least one of the transistor is controlled on its threshold voltage by a selective ion implantation after formation of the metal interconnection layer.
摘要翻译: 半导体器件包括多个晶体管,包括形成在半导体衬底上的多个晶体管和连接到至少一个晶体管的金属互连层的半导体器件,其中金属互连层由单层或多层组成, 单层或多层的至少一层由铜或铜合金形成,并且通过阻挡层全部或部分连接至至少一个晶体管; 并且在形成金属互连层之后,通过选择性离子注入将晶体管中的至少一个控制在其阈值电压上。
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