SEMICONDUCTOR BIO-SENSORS AND METHODS OF MANUFACTURING THE SAME
    11.
    发明申请
    SEMICONDUCTOR BIO-SENSORS AND METHODS OF MANUFACTURING THE SAME 有权
    半导体生物传感器及其制造方法

    公开(公告)号:US20120270350A1

    公开(公告)日:2012-10-25

    申请号:US13538455

    申请日:2012-06-29

    IPC分类号: H01L21/02

    摘要: A method of manufacturing a semiconductor bio-sensor comprises providing a substrate, forming a first dielectric layer on the substrate, forming a patterned first conductive layer on the first dielectric layer, the patterned first conductive layer including a first portion and a pair of second portions, forming a second dielectric layer, a third dielectric layer and a fourth dielectric layer in sequence over the patterned first conductive layer, forming cavities into the fourth dielectric layer, forming vias through the cavities, exposing the second portions of the patterned first conductive layer, forming a patterned second conductive layer on the fourth dielectric layer, forming a passivation layer on the patterned second conductive layer, forming an opening to expose a portion of the third dielectric layer over the first portion of the patterned first conductive layer, and forming a chamber through the opening.

    摘要翻译: 制造半导体生物传感器的方法包括:提供衬底,在衬底上形成第一介电层,在第一电介质层上形成图案化的第一导电层,图案化的第一导电层包括第一部分和一对第二部分 在所述图案化的第一导电层上依次形成第二电介质层,第三电介质层和第四电介质层,在所述第四电介质层中形成空腔,通过所述空腔形成通孔,暴露所述图案化的第一导电层的第二部分, 在所述第四电介质层上形成图案化的第二导电层,在所述图案化的第二导电层上形成钝化层,形成开口,以暴露所述图案化的第一导电层的所述第一部分上的所述第三电介质层的一部分, 通过开放。

    Semiconductor bio-sensors and methods of manufacturing the same
    12.
    发明授权
    Semiconductor bio-sensors and methods of manufacturing the same 有权
    半导体生物传感器及其制造方法相同

    公开(公告)号:US08227877B2

    公开(公告)日:2012-07-24

    申请号:US12835909

    申请日:2010-07-14

    IPC分类号: H01L27/14 H01L23/58

    摘要: A method of manufacturing a semiconductor bio-sensor comprises providing a substrate, forming a first dielectric layer on the substrate, forming a patterned first conductive layer on the first dielectric layer, the patterned first conductive layer including a first portion and a pair of second portions, forming a second dielectric layer, a third dielectric layer and a fourth dielectric layer in sequence over the patterned first conductive layer, forming cavities into the fourth dielectric layer, forming vias through the cavities, exposing the second portions of the patterned first conductive layer, forming a patterned second conductive layer on the fourth dielectric layer, forming a passivation layer on the patterned second conductive layer, forming an opening to expose a portion of the third dielectric layer over the first portion of the patterned first conductive layer, and forming a chamber through the opening.

    摘要翻译: 制造半导体生物传感器的方法包括:提供衬底,在衬底上形成第一介电层,在第一电介质层上形成图案化的第一导电层,图案化的第一导电层包括第一部分和一对第二部分 在所述图案化的第一导电层上依次形成第二电介质层,第三电介质层和第四电介质层,在所述第四电介质层中形成空腔,形成通过所述空腔的通孔,暴露所述图案化的第一导电层的第二部分, 在所述第四电介质层上形成图案化的第二导电层,在所述图案化的第二导电层上形成钝化层,形成开口,以暴露所述图案化的第一导电层的所述第一部分上的所述第三电介质层的一部分, 通过开放。

    Hermetically sealed electrical switch assembly
    13.
    发明授权
    Hermetically sealed electrical switch assembly 有权
    密封式电气开关总成

    公开(公告)号:US06762662B2

    公开(公告)日:2004-07-13

    申请号:US09987422

    申请日:2001-11-14

    IPC分类号: H01H3514

    CPC分类号: H01H36/0073 H01H9/04

    摘要: A hermetically sealed electrical switch assembly comprises a casing having an opening end. A cover is sealingly attached to said opening end of said casing for forming a primary volume hermetically sealed from external environment. Received in said primary volume are a switch means and a magnetic responsive means. A magnetic activating means is fitted at the upper surface of said cover for effecting the movement of said magnetic responsive means. The switch means comprises electrical contacts to change the conducting state of a power circuit with which said switch means is connected, a switching lever which can change its positions according to the conducting state of the power circuit. The magnetic responsive means couples with said switching lever for moving with it.

    摘要翻译: 气密密封的电气开关组件包括具有开口端的壳体。 密封地附接到所述壳体的所述开口端的盖,用于形成从外部环境密封密封的主体积。 在所述主体积中接收的是开关装置和磁响应装置。 磁性激活装置安装在所述盖的上表面上,以实现所述磁响应装置的运动。 开关装置包括电触头,以改变与所述开关装置连接的电源电路的导通状态,切换杆可根据电源电路的导通状态改变其位置。 磁响应装置与所述切换杆耦合以与其一起移动。

    Tube chemical gas deposition method of preparing titanium nitride coated
titanium carbide for titanium carbide/silicon nitride composites
    14.
    发明授权
    Tube chemical gas deposition method of preparing titanium nitride coated titanium carbide for titanium carbide/silicon nitride composites 失效
    用于碳化钛/氮化硅复合材料的氮化钛涂层碳化钛的管化学气体沉积方法

    公开(公告)号:US5849360A

    公开(公告)日:1998-12-15

    申请号:US670259

    申请日:1996-06-20

    摘要: A tube chemical vapor deposition method of preparing titanium carbide/silicon nitride (TiC/Si.sub.3 N.sub.4) composites. To prepare such composites, titanium carbide (TiC) is first coated with a homogeneous layer of titanium nitride (Ti.sub.3 N.sub.4). A gas mixture of titanium chloride (TiCl.sub.4), nitrogen (N.sub.2), hydrogen (H.sub.2) with an appropriate ratio is introduced into a reaction chamber where the tube chemical vapor deposition takes place. The temperature of the reaction for the sintering process is between 900.degree. C. to 1200.degree. C., under a total pressure of 1 atm. While maintaining a constant temperature for 1 to 2 hours, deposition of titanium nitride (Ti.sub.3 N.sub.4) onto titanium carbide (TiC) powder takes place. The adoption of the simple tube chemical vapor deposition technique for the present invention not only enables a mass production of homogeneously coated titanium carbide (TiC) particulates, but also further enhances the hardness and toughness as well as other mechanical properties of silicon based composites, such as a titanium carbide/silicon nitride (TiC/Si.sub.3 N.sub.4) composite.

    摘要翻译: 一种制备碳化钛/氮化硅(TiC / Si3N4)复合材料的管化学气相沉积方法。 为了制备这种复合材料,首先用均匀的氮化钛(Ti 3 N 4)层涂覆碳化钛(TiC)。 将具有适当比例的氯化钛(TiCl 4),氮(N 2),氢(H 2)的气体混合物引入到发生管化学气相沉积的反应室中。 烧结过程的反应温度为900〜1200℃,总压力为1个大气压。 在保持恒温1〜2小时的同时,将氮化钛(Ti 3 N 4)沉积到碳化钛(TiC)粉末上。 采用本发明的简单管化学气相沉积技术不仅可以大量生产均匀涂覆的碳化钛(TiC)颗粒,而且可以进一步提高硅基复合材料的硬度和韧性以及其它机械性能,例如 作为碳化钛/氮化硅(TiC / Si 3 N 4)复合体。

    Sealed electric switch assembly
    15.
    发明授权
    Sealed electric switch assembly 失效
    密封电开关总成

    公开(公告)号:US5777536A

    公开(公告)日:1998-07-07

    申请号:US857867

    申请日:1997-05-16

    摘要: A sealed electric switch assembly comprises a magnetic control assembly having first and second magnetic members which is mounted to a top wall of a sealed casing, and an elongated plate having third and fourth magnetic members which is mounted oppositely to the first and second magnetic members so that the elongated plate member can be attracted and repulsed magnetically by the magnetic control assembly. A linkage mechanism is mounted adjacent to the elongated plate member for moving a movable contact of a movable arm to connect and disconnect with a stationary contact. A rotary assembly and a tripping assembly are mounted above the linkage mechanism and over an electromagnet.

    摘要翻译: 密封电开关组件包括具有安装到密封壳体的顶壁的第一和第二磁性构件的磁控制组件和具有与第一和第二磁性构件相对地安装的第三和第四磁性构件的细长板, 细长板构件可以被磁控制组件磁吸引并排斥。 连接机构安装在细长板构件附近,用于移动可动臂的可动触点以与固定触点连接和断开。 旋转组件和跳闸组件安装在连杆机构上方和电磁体上方。

    Method for fabricating a non-volatile memory and metal interconnect process
    16.
    发明授权
    Method for fabricating a non-volatile memory and metal interconnect process 有权
    制造非易失性存储器和金属互连工艺的方法

    公开(公告)号:US06881619B1

    公开(公告)日:2005-04-19

    申请号:US10707707

    申请日:2004-01-06

    摘要: A method for fabricating a non-volatile memory is provided. A stacked structure including a tunneling layer, a trapping layer, a barrier layer, and a control gate is formed on a substrate. A source region and a drain region are formed beside the stacked structure in the substrate. A silicon oxide spacer is formed on the sidewalls of the stacked structure. An ultraviolet-resistant lining layer is formed on the surfaces of the substrate and the stacked structure to prevent the ultraviolet light from penetrating into the trapping layer. A dielectric layer is formed on the ultraviolet-resistant lining layer. A contact being electrically connected to the control gate is formed in the dielectric layer. A conducting line electrically connected to the contact is formed on the dielectric layer. A lost-surface-charge lining layer is formed on the surfaces of the dielectric layer and the conducting line to reduce the antenna effect.

    摘要翻译: 提供了一种用于制造非易失性存储器的方法。 在衬底上形成包括隧道层,俘获层,阻挡层和控制栅极的堆叠结构。 源极区域和漏极区域形成在基板的层叠结构的旁边。 在堆叠结构的侧壁上形成氧化硅隔离物。 在基板和堆叠结构的表面上形成防紫外线衬层,以防止紫外线侵入捕获层。 在耐紫外线衬层上形成介电层。 在电介质层中形成电连接到控制栅极的触点。 在电介质层上形成与触点电连接的导线。 在介电层和导电线的表面上形成失去表面的电荷衬里层,以减少天线效应。