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    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME
    2.
    发明申请
    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号：US20120001260A1

    公开(公告)日：2012-01-05

    申请号：US12830178

    申请日：2010-07-02

    申请人： Hsueh I. Huang ,  Ming-Tung Lee ,  Shyi-Yuan Wu

    发明人： Hsueh I. Huang ,  Ming-Tung Lee ,  Shyi-Yuan Wu

    IPC分类号： H01L27/088 ,  H01L29/78

    CPC分类号： H01L29/7816 ,  H01L29/0623 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1083 ,  H01L29/42368 ,  H01L29/66681

    摘要： A semiconductor device for use in a relatively high voltage application that comprises a substrate, a first n-type well region in the substrate to serve as a high voltage n-well (HVNW) for the semiconductor device, a pair of second n-type well regions in the first n-type well region, a p-type region in the first n-type well region between the second n-type well regions, a pair of conductive regions on the substrate between the second n-type well regions, and a number of n-type regions to serve as n-type buried layers (NBLs) for the semiconductor device, wherein the NBLs are located below the first n-type region and dispersed in the substrate.

    摘要翻译： 一种在相对高电压应用中使用的半导体器件，包括衬底，用作半导体器件的高电压n阱（HVNW）的衬底中的第一n型阱区，一对第二n型阱 第一n型阱区中的第一n型阱区中的p型区，第二n型阱区之间的基板上的一对导电区域， 以及用作半导体器件的n型掩埋层（NBL）的多个n型区域，其中NBL位于第一n型区域下方并分散在衬底中。

    Method for fabricating a non-volatile memory and metal interconnect process
    4.
    发明授权
    Method for fabricating a non-volatile memory and metal interconnect process 有权
    制造非易失性存储器和金属互连工艺的方法

    公开(公告)号：US06881619B1

    公开(公告)日：2005-04-19

    申请号：US10707707

    申请日：2004-01-06

    申请人： Ming-Tung Lee ,  Chao-Ching Lin

    发明人： Ming-Tung Lee ,  Chao-Ching Lin

    IPC分类号： H01L21/28 ,  H01L21/336 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/8247

    CPC分类号： H01L29/66833 ,  H01L21/28282 ,  Y10S438/954

    摘要： A method for fabricating a non-volatile memory is provided. A stacked structure including a tunneling layer, a trapping layer, a barrier layer, and a control gate is formed on a substrate. A source region and a drain region are formed beside the stacked structure in the substrate. A silicon oxide spacer is formed on the sidewalls of the stacked structure. An ultraviolet-resistant lining layer is formed on the surfaces of the substrate and the stacked structure to prevent the ultraviolet light from penetrating into the trapping layer. A dielectric layer is formed on the ultraviolet-resistant lining layer. A contact being electrically connected to the control gate is formed in the dielectric layer. A conducting line electrically connected to the contact is formed on the dielectric layer. A lost-surface-charge lining layer is formed on the surfaces of the dielectric layer and the conducting line to reduce the antenna effect.

    摘要翻译： 提供了一种用于制造非易失性存储器的方法。 在衬底上形成包括隧道层，俘获层，阻挡层和控制栅极的堆叠结构。 源极区域和漏极区域形成在基板的层叠结构的旁边。 在堆叠结构的侧壁上形成氧化硅隔离物。 在基板和堆叠结构的表面上形成防紫外线衬层，以防止紫外线侵入捕获层。 在耐紫外线衬层上形成介电层。 在电介质层中形成电连接到控制栅极的触点。 在电介质层上形成与触点电连接的导线。 在介电层和导电线的表面上形成失去表面的电荷衬里层，以减少天线效应。

    SEMICONDUCTOR BIO-SENSORS AND METHODS OF MANUFACTURING THE SAME
    8.
    发明申请
    SEMICONDUCTOR BIO-SENSORS AND METHODS OF MANUFACTURING THE SAME 有权

    公开(公告)号：US20120012900A1

    公开(公告)日：2012-01-19

    申请号：US12835909

    申请日：2010-07-14

    申请人： Ming-Tung LEE ,  Shih-Chin LIEN ,  Chia-Huan CHANG

    发明人： Ming-Tung LEE ,  Shih-Chin LIEN ,  Chia-Huan CHANG

    IPC分类号： H01L29/772 ,  H01L21/30

    CPC分类号： G01N33/525 ,  G01N27/4145 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of manufacturing a semiconductor bio-sensor comprises providing a substrate, forming a first dielectric layer on the substrate, forming a patterned first conductive layer on the first dielectric layer, the patterned first conductive layer including a first portion and a pair of second portions, forming a second dielectric layer, a third dielectric layer and a fourth dielectric layer in sequence over the patterned first conductive layer, forming cavities into the fourth dielectric layer, forming vias through the cavities, exposing the second portions of the patterned first conductive layer, forming a patterned second conductive layer on the fourth dielectric layer, forming a passivation layer on the patterned second conductive layer, forming an opening to expose a portion of the third dielectric layer over the first portion of the patterned first conductive layer, and forming a chamber through the opening.

    Hermetically sealed electrical switch assembly
    9.
    发明授权
    Hermetically sealed electrical switch assembly 有权
    密封式电气开关总成

    公开(公告)号：US06762662B2

    公开(公告)日：2004-07-13

    申请号：US09987422

    申请日：2001-11-14

    申请人： Wen-Fong Lee ,  Ming-Hung Lee ,  Ming-Tung Lee ,  Ming-Yu Lee

    发明人： Wen-Fong Lee ,  Ming-Hung Lee ,  Ming-Tung Lee ,  Ming-Yu Lee

    IPC分类号： H01H3514

    CPC分类号： H01H36/0073 ,  H01H9/04

    摘要： A hermetically sealed electrical switch assembly comprises a casing having an opening end. A cover is sealingly attached to said opening end of said casing for forming a primary volume hermetically sealed from external environment. Received in said primary volume are a switch means and a magnetic responsive means. A magnetic activating means is fitted at the upper surface of said cover for effecting the movement of said magnetic responsive means. The switch means comprises electrical contacts to change the conducting state of a power circuit with which said switch means is connected, a switching lever which can change its positions according to the conducting state of the power circuit. The magnetic responsive means couples with said switching lever for moving with it.

    摘要翻译： 气密密封的电气开关组件包括具有开口端的壳体。 密封地附接到所述壳体的所述开口端的盖，用于形成从外部环境密封密封的主体积。 在所述主体积中接收的是开关装置和磁响应装置。 磁性激活装置安装在所述盖的上表面上，以实现所述磁响应装置的运动。 开关装置包括电触头，以改变与所述开关装置连接的电源电路的导通状态，切换杆可根据电源电路的导通状态改变其位置。 磁响应装置与所述切换杆耦合以与其一起移动。

    Semiconductor bio-sensors and methods of manufacturing the same
    10.
    发明授权
    Semiconductor bio-sensors and methods of manufacturing the same 有权
    半导体生物传感器及其制造方法相同

    公开(公告)号：US08357547B2

    公开(公告)日：2013-01-22

    申请号：US13538455

    申请日：2012-06-29

    申请人： Ming-Tung Lee ,  Shih-Chin Lien ,  Chia-Huan Chang

    发明人： Ming-Tung Lee ,  Shih-Chin Lien ,  Chia-Huan Chang

    IPC分类号： H01L21/00 ,  H01L21/84

    CPC分类号： G01N33/525 ,  G01N27/4145 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method of manufacturing a semiconductor bio-sensor comprises providing a substrate, forming a first dielectric layer on the substrate, forming a patterned first conductive layer on the first dielectric layer, the patterned first conductive layer including a first portion and a pair of second portions, forming a second dielectric layer, a third dielectric layer and a fourth dielectric layer in sequence over the patterned first conductive layer, forming cavities into the fourth dielectric layer, forming vias through the cavities, exposing the second portions of the patterned first conductive layer, forming a patterned second conductive layer on the fourth dielectric layer, forming a passivation layer on the patterned second conductive layer, forming an opening to expose a portion of the third dielectric layer over the first portion of the patterned first conductive layer, and forming a chamber through the opening.

    摘要翻译： 制造半导体生物传感器的方法包括：提供衬底，在衬底上形成第一介电层，在第一电介质层上形成图案化的第一导电层，图案化的第一导电层包括第一部分和一对第二部分 在所述图案化的第一导电层上依次形成第二电介质层，第三电介质层和第四电介质层，在所述第四电介质层中形成空腔，形成通过所述空腔的通孔，暴露所述图案化的第一导电层的第二部分， 在所述第四电介质层上形成图案化的第二导电层，在所述图案化的第二导电层上形成钝化层，形成开口，以暴露所述图案化的第一导电层的所述第一部分上的所述第三电介质层的一部分， 通过开放。