公开(公告)号：US20220311532A1

公开(公告)日：2022-09-29

申请号：US17840965

申请日：2022-06-15

Applicant: Huawei Technologies Co., Ltd.

Inventor： Jinhui Wang ,  Cong Chen ,  Jingfei Lv

IPC: H04J3/06 ,  H04B10/079

Abstract: A fiber link detection method is implemented by a first network device of an optical communications network. The fiber link detection method includes obtaining a forward delay value indicating a forward delay of transmitting a first Precision Time Protocol (PTP) packet by a second interface of a second network device to a first interface of the first network device over a fiber link. A reverse delay value indicating a reverse delay of transmitting a second PTP packet by the first interface to the second interface over the fiber link is obtained, and a determination is made, based on the forward delay value, the reverse delay value, and a first threshold, that the fiber link comprises a third network device, where the first network device and the second network device support a PTP, and where the third network device does not support the PTP.

公开(公告)号：US09998214B2

公开(公告)日：2018-06-12

申请号：US15289398

申请日：2016-10-10

Applicant: Huawei Technologies Co., Ltd.

Inventor： Xiaoping Zhou ,  Jinrong Yin ,  Cong Chen

IPC: H04B10/071 ,  H04J14/02 ,  H04B10/70 ,  H04B10/80

CPC classification number: H04B10/071 ,  H04B10/70 ,  H04B10/80 ,  H04J14/0282

Abstract: Embodiments disclose an OTDR implementation apparatus. The apparatus includes M transmitters, configured to transmit M optical waves of different wavelengths, where M is greater than or equal to 2. The apparatus also includes a processor, configured to control an OTDR detection circuit to load an OTDR detection signal onto a first transmitter, where the first transmitter is configured to only load the OTDR detection signal, and the other M−1 transmitters are configured to transmit a downlink optical signal, where the downlink optical signal is a high frequency signal. The apparatus also includes the OTDR detection circuit, configured to generate the OTDR detection signal, where the OTDR detection signal is a low frequency signal; and M receivers, where a first receiver is connected to an egress link of the M transmitters, and the other M−1 receivers are connected after a demultiplexer, and are configured to receive multiple uplink signals.

公开(公告)号：US10291446B2

公开(公告)日：2019-05-14

申请号：US15965362

申请日：2018-04-27

Applicant: Huawei Technologies Co., Ltd.

Inventor： Chuan Xu ,  Cong Chen

IPC: H04L27/00 ,  H04J3/06 ,  H04L7/00 ,  H04Q11/04

Abstract: A clock synchronization method, a receiver, a transmitter, and a clock synchronization system, where the method includes obtaining a common reference clock signal, determining Bt according to the common reference clock signal and Mrd(t−1), where B t = mod ⁢ [ ∑ n = 0 t - 1 ⁢ ⁢ Mr d ⁡ ( n ) , 2 p ] , determining that Mrd(t−1) is a target Mrd when Ct obtained by means of calculation according to Mrd(t−1) is less than or equal to a threshold, where Ct=Bt−At, At is included in a residual time stamp (RTS) packet received by a receiver last time from the transmitter, and A t = mod ⁢ [ ∑ n = 0 t ⁢ ⁢ M d ⁡ ( n ) , 2 p ] , performing frequency division on the common reference clock signal using the target Mrd as a frequency dividing coefficient to obtain a first clock signal, and performing frequency multiplication processing on the first clock signal to obtain a service clock signal. Hence, random phase offset may be avoided.

公开(公告)号：US09910218B2

公开(公告)日：2018-03-06

申请号：US14757746

申请日：2015-12-23

Applicant: Huawei Technologies Co., Ltd.

Inventor： Shu Li ,  Cong Chen ,  Sulin Yang

IPC: H04B10/40 ,  G02B6/12 ,  H04Q11/00 ,  G02B6/42

CPC classification number: G02B6/12004 ,  G02B6/42 ,  G02B6/4286 ,  G02B2006/121 ,  G02B2006/12109 ,  G02B2006/12121 ,  G02B2006/12123 ,  G02B2006/12126 ,  G02B2006/12164 ,  H04Q11/0067 ,  H04Q2011/0016 ,  H04Q2011/0049

Abstract: The present invention provides an optical module and an optical network system. A first chip is arranged on a lower cover plate, an upper cladding, which is close to a first PD, of the first chip is covered by a first upper cover plate; a first dividing groove divides the first chip into two parts, and a WDM and a light blocking material are arranged inside the first dividing groove, so as to block stray light transmitted inside the upper cladding, a sandwich layer, a lower cladding, and a base of the first chip; and a light blocking material is arranged on a side of the first upper cover plate facing the first LD, so as to block stray light transmitted on a surface of the first chip, thereby blocking the stray light that enters the first PD, and significantly reducing crosstalk of the optical module.

公开(公告)号：US20160182214A1

公开(公告)日：2016-06-23

申请号：US15057350

申请日：2016-03-01

Applicant: Huawei Technologies Co., Ltd.

Inventor： Cong Chen

IPC: H04L7/00

CPC classification number: H04L7/0008 ,  H04J3/0641 ,  H04J3/0658

Abstract: A method and an apparatus for determining an Ethernet clock source are provided. The method includes: receiving a first clock information packet sent by a first clock device, where the first clock information packet is used to indicate clock source information of the first clock device; based on clock source device identifiers and at least one type of information of the following information: clock source device quality grades, clock source information transfer hop counts, clock source information receiving port numbers, and clock source information sending device identifiers, determining a target clock source; and determining the target clock source as a clock source of the second clock device. In the method and the apparatus of the application, a preferable clock source can be simply, effectively, and reliably determined, a clock can be prevented from forming a loop, and clock deployment can be simplified.

Abstract translation: 提供了一种用于确定以太网时钟源的方法和装置。 该方法包括：接收由第一时钟设备发送的第一时钟信息分组，其中第一时钟信息分组用于指示第一时钟设备的时钟源信息; 基于时钟源设备标识符和以下信息的至少一种类型的信息：时钟源设备质量等级，时钟源信息传输跳数，时钟源信息接收端口号和时钟源信息发送设备标识符，确定目标时钟 资源; 以及将所述目标时钟源确定为所述第二时钟设备的时钟源。 在本申请的方法和装置中，优选的时钟源可以简单，有效且可靠地确定，可以防止时钟形成循环，从而可以简化时钟部署。

公开(公告)号：US20160124146A1

公开(公告)日：2016-05-05

申请号：US14757746

申请日：2015-12-23

Applicant: Huawei Technologies Co., Ltd

Inventor： Shu Li ,  Cong Chen ,  Sulin Yang

IPC: G02B6/12 ,  H04Q11/00

CPC classification number: G02B6/12004 ,  G02B6/42 ,  G02B6/4286 ,  G02B2006/121 ,  G02B2006/12109 ,  G02B2006/12121 ,  G02B2006/12123 ,  G02B2006/12126 ,  G02B2006/12164 ,  H04Q11/0067 ,  H04Q2011/0016 ,  H04Q2011/0049

Abstract: The present invention provides an optical module and an optical network system. A first chip is arranged on a lower cover plate, an upper cladding, which is close to a first PD, of the first chip is covered by a first upper cover plate; a first dividing groove divides the first chip into two parts, and a WDM and a light blocking material are arranged inside the first dividing groove, so as to block stray light transmitted inside the upper cladding, a sandwich layer, a lower cladding, and a base of the first chip; and a light blocking material is arranged on a side of the first upper cover plate facing the first LD, so as to block stray light transmitted on a surface of the first chip, thereby blocking the stray light that enters the first PD, and significantly reducing crosstalk of the optical module.

Abstract translation: 本发明提供一种光模块和光网络系统。 第一芯片布置在下盖板上，第一芯片靠近第一PD的上包层被第一上盖板覆盖; 第一分割槽将第一芯片分成两部分，并且WDM和遮光材料布置在第一分隔槽的内部，以便阻止在上部包层内传输的杂散光，夹层，下部包层和 第一芯片的基地; 并且在第一上盖板的面向第一LD的一侧上布置遮光材料，以便阻挡在第一芯片的表面上传播的杂散光，从而阻挡进入第一PD的杂散光，并且显着地减少 光模块的串扰。