公开(公告)号：US08143927B2

公开(公告)日：2012-03-27

申请号：US13091544

申请日：2011-04-21

申请人： Kyoung-Nam Kim ,  Tae-Yun Kim

发明人： Kyoung-Nam Kim ,  Tae-Yun Kim

IPC分类号： H03K5/04

CPC分类号： G06F1/04 ,  H03K5/1565 ,  H03K2005/00091

摘要： A pulse control device is maintained with a constant pulse width corresponding to a change of process or temperature. The pulse control device comprises a fuse set for selectively outputting a delay increase signal and a delay decrease signal that have a different state based on a cutting or non-cutting state of a fuse on which information on a change of process is programmed, and a pulse generator provided with a plurality of delay cells with predetermined time delay for selectively increasing or decreasing the number of the plurality of delay cells depending on the delay increase signal and the delay decrease signal to generate an internal clock with a pulse width corresponding to the number of the increased or decreased delay cells.

摘要翻译： 维持脉冲控制装置，其具有对应于过程或温度变化的恒定脉冲宽度。 所述脉冲控制装置包括用于选择性地输出延迟增加信号和延迟减小信号的熔丝，所述延迟增加信号和延迟减小信号基于其上编程关于过程改变的信息的熔丝的切割或非切割状态具有不同的状态，以及 脉冲发生器，其具有预定的时间延迟的多个延迟单元，用于根据所述延迟增加信号和所述延迟减小信号选择性地增加或减少所述多个延迟单元的数量，以产生具有对应于所述数量的脉冲宽度的内部时钟 的延迟细胞增加或减少。

公开(公告)号：US07853299B2

公开(公告)日：2010-12-14

申请号：US11978572

申请日：2007-10-30

申请人： Sung-Ill Kang ,  Tae-Yun Kim ,  Jong-Gun Bae

发明人： Sung-Ill Kang ,  Tae-Yun Kim ,  Jong-Gun Bae

IPC分类号： H04M1/00

CPC分类号： H04N5/2252 ,  H04N2007/145

摘要： A portable communication device including a first housing and second housing, wherein the second housing is connected to the first housing so that it is rotatable around a first hinge axis while facing a top surface of the first housing to allow movement toward or away from the first housing. The device also includes a third housing connected to the second housing so that it is rotatable around the first hinge axis while facing the top surface of the first housing to allow movement toward or away from the first housing, and rotatable around a third hinge axis to allow rotational movement of a display. A battery pack, serving as a grip, is connected to the first housing so that it is rotatable around a third hinge axis while facing a bottom surface of the first housing to allow movement toward or away from the first housing. A sensing unit is provided to sense whether the battery pack is rotated.

摘要翻译： 一种包括第一壳体和第二壳体的便携式通信装置，其中所述第二壳体连接到所述第一壳体，使得所述第二壳体可围绕第一铰链轴线旋转，同时面向所述第一壳体的顶表面，以允许朝向或远离所述第一壳体 住房。 该装置还包括连接到第二壳体的第三壳体，使得其可围绕第一铰链轴线旋转，同时面向第一壳体的顶表面，以允许朝向或远离第一壳体移动，并且可围绕第三铰链轴线转动至 允许显示器的旋转移动。 用作手柄的电池组连接到第一壳体，使得其能够围绕第三铰链轴线旋转，同时面向第一壳体的底表面以允许朝向或远离第一壳体移动。 提供感测单元以感测电池组是否旋转。

公开(公告)号：US07622973B2

公开(公告)日：2009-11-24

申请号：US11477591

申请日：2006-06-30

申请人： Kyoung-Nam Kim ,  Tae-Yun Kim

发明人： Kyoung-Nam Kim ,  Tae-Yun Kim

IPC分类号： H03K5/04

CPC分类号： G06F1/04 ,  H03K5/1565 ,  H03K2005/00091

摘要： Provided is a pulse control device is maintained with a constant pulse width corresponding to a change of process or temperature. The pulse control device comprises a fuse set for selectively outputting a delay increase signal and a delay decrease signal that have a different state based on a cutting or non-cutting state of a fuse on which information on a change of process is programmed, and a pulse generator provided with a plurality of delay cells with predetermined time delay for selectively increasing or decreasing the number of the plurality of delay cells depending on the delay increase signal and the delay decrease signal to generate an internal clock with a pulse width corresponding to the number of the increased or decreased delay cells.

摘要翻译： 提供了一种脉冲控制装置，其具有对应于过程或温度变化的恒定脉冲宽度。 所述脉冲控制装置包括用于选择性地输出延迟增加信号和延迟减小信号的熔丝，所述延迟增加信号和延迟减小信号基于其上编程关于过程改变的信息的熔丝的切割或非切割状态具有不同的状态，以及 脉冲发生器，其具有预定的时间延迟的多个延迟单元，用于根据所述延迟增加信号和所述延迟减小信号选择性地增加或减少所述多个延迟单元的数量，以产生具有对应于所述数量的脉冲宽度的内部时钟 的延迟细胞增加或减少。

公开(公告)号：US07560978B2

公开(公告)日：2009-07-14

申请号：US11806558

申请日：2007-06-01

申请人： Sang-Jin Byeon ,  Tae-Yun Kim ,  Jun-Gi Choi

发明人： Sang-Jin Byeon ,  Tae-Yun Kim ,  Jun-Gi Choi

IPC分类号： G05F1/10

CPC分类号： G05F1/465

摘要： An internal voltage generator for use in a semiconductor memory device includes a first voltage detection unit, a second voltage detection unit, a detection signal generation unit, and an internal voltage generation unit. The first voltage detection unit detects a voltage level of an internal voltage changing linearly depending on a temperature variation to output a first detection signal. The second voltage detection unit detects the voltage level having a constant value without concerning the temperature variation to output a second detection signal. The detection signal output unit combines the first and the second detection signal to generate a combined detection signal for detecting the voltage level linearly varying according to the temperature variation in a first range of temperature and detecting the voltage level having the constant value in a second range of temperature.

摘要翻译： 用于半导体存储器件的内部电压发生器包括第一电压检测单元，第二电压检测单元，检测信号生成单元和内部电压产生单元。 第一电压检测单元检测根据温度变化线性变化的内部电压的电压电平，以输出第一检测信号。 第二电压检测单元检测具有恒定值的电压电平而不涉及温度变化以输出第二检测信号。 检测信号输出单元组合第一和第二检测信号以产生组合检测信号，用于根据第一温度范围内的温度变化检测线性变化的电压电平，并检测具有第二范围中的常数值的电压电平 的温度。

公开(公告)号：US20070279123A1

公开(公告)日：2007-12-06

申请号：US11806558

申请日：2007-06-01

申请人： Sang-Jin Byeon ,  Tae-Yun Kim ,  Jun-Gi Choi

发明人： Sang-Jin Byeon ,  Tae-Yun Kim ,  Jun-Gi Choi

IPC分类号： G05F1/10

CPC分类号： G05F1/465

摘要： An internal voltage generator for use in a semiconductor memory device includes a first voltage detection unit, a second voltage detection unit, a detection signal generation unit, and an internal voltage generation unit. The first voltage detection unit detects a voltage level of an internal voltage changing linearly depending on a temperature variation to output a first detection signal. The second voltage detection unit detects the voltage level having a constant value without concerning the temperature variation to output a second detection signal. The detection signal output unit combines the first and the second detection signal to generate a combined detection signal for detecting the voltage level linearly varying according to the temperature variation in a first range of temperature and detecting the voltage level having the constant value in a second range of temperature.

摘要翻译： 用于半导体存储器件的内部电压发生器包括第一电压检测单元，第二电压检测单元，检测信号生成单元和内部电压产生单元。 第一电压检测单元检测根据温度变化线性变化的内部电压的电压电平，以输出第一检测信号。 第二电压检测单元检测具有恒定值的电压电平而不涉及温度变化以输出第二检测信号。 检测信号输出单元组合第一和第二检测信号以产生组合检测信号，用于根据第一温度范围内的温度变化检测线性变化的电压电平，并检测具有第二范围中的常数值的电压电平 的温度。

公开(公告)号：US06430100B2

公开(公告)日：2002-08-06

申请号：US09734581

申请日：2000-12-13

申请人： Tae-Yun Kim

发明人： Tae-Yun Kim

IPC分类号： G11C700

CPC分类号： G11C29/824

摘要： A redundancy circuitry is used in a memory device for repairing defects in a packaged memory having registers by using antifuse. The redundancy circuitry includes: an anticell for storing data to be replaced; a temporary anticell for storing the data temporarily; a row and a column antifuse composed of antifuse and anti enable fuse corresponding to a row and column address, respectively; an antifuse controller for controlling the programming of the antifuse; a voltage supplier for supplying a voltage to program the antifuse; a row and a column comparators for comparing the programmed row and column antifuses and the external input address, respectively; an anti-controller for controlling to provide data from the anticell on a read operation and to temporarily store the external data to the temporary anticell on a write operation based on the comparison signals; a restore controller for, based on the row address on a restore operation, transferring the external data identical to the programmed fuse address to the anticell; and a channel selection memory for storing the channel address for pre-fetch and restore operations provided during read and write operations.

摘要翻译： 冗余电路用于存储器件中，用于通过使用反熔丝修复具有寄存器的封装存储器中的缺陷。 冗余电路包括：用于存储要被替换的数据的解码器; 用于临时存储数据的临时anticell; 分别由对应于行和列地址的反熔丝和反使能熔丝组成的一列和一列反熔丝; 用于控制反熔丝编程的反熔丝控制器; 用于提供电压来编程反熔丝的电压供应器; 用于分别比较编程的行和列反相变换和外部输入地址的行和列比较器; 一个反控制器，用于控制在读取操作时提供来自反码器的数据，并且在基于比较信号的写入操作中将外部数据临时存储到临时防变频器; 恢复控制器，用于基于还原操作上的行地址将与编程的熔丝地址相同的外部数据传送到该抗蚀剂; 以及用于存储在读取和写入操作期间提供的用于预取和恢复操作的通道地址的通道选择存储器。

公开(公告)号：US20110193604A1

公开(公告)日：2011-08-11

申请号：US13091544

申请日：2011-04-21

申请人： Kyoung-Nam KIM ,  Tae-Yun Kim

发明人： Kyoung-Nam KIM ,  Tae-Yun Kim

IPC分类号： H03K5/04

CPC分类号： G06F1/04 ,  H03K5/1565 ,  H03K2005/00091

摘要： A pulse control device is maintained with a constant pulse width corresponding to a change of process or temperature. The pulse control device comprises a fuse set for selectively outputting a delay increase signal and a delay decrease signal that have a different state based on a cutting or non-cutting state of a fuse on which information on a change of process is programmed, and a pulse generator provided with a plurality of delay cells with predetermined time delay for selectively increasing or decreasing the number of the plurality of delay cells depending on the delay increase signal and the delay decrease signal to generate an internal clock with a pulse width corresponding to the number of the increased or decreased delay cells.

摘要翻译： 维持脉冲控制装置，其具有对应于过程或温度变化的恒定脉冲宽度。 所述脉冲控制装置包括用于选择性地输出延迟增加信号和延迟减小信号的熔丝，所述延迟增加信号和延迟减小信号基于其上编程关于过程改变的信息的熔丝的切割或非切割状态具有不同的状态，以及 脉冲发生器，其具有预定的时间延迟的多个延迟单元，用于根据所述延迟增加信号和所述延迟减小信号选择性地增加或减少所述多个延迟单元的数量，以产生具有对应于所述数量的脉冲宽度的内部时钟 的延迟细胞增加或减少。

公开(公告)号：US07629822B2

公开(公告)日：2009-12-08

申请号：US12078095

申请日：2008-03-27

申请人： Kyoung-Nam Kim ,  Tae-Yun Kim

发明人： Kyoung-Nam Kim ,  Tae-Yun Kim

IPC分类号： H03L7/06

CPC分类号： G11C7/1072 ,  G11C7/222

摘要： Provided are a delay locked loop (DLL) and a method for generating a divided clock therein. In the DLL, a width of a reference frequency for phase comparison can be changed depending on a magnitude of an operating frequency. In the DLL, a clock buffer receives a clock equal to an external clock and generates an internal clock. An enable clock generator generates a 1-period enable clock or a 2-period enable clock using a command signal generated for performing a predefined operation. The command signal is generated according to an address command signal inputted from an exterior. A clock divider divides the internal clock to generate a divided clock. The divided clock is controlled by the 1-period enable clock or the 2-period enable clock, such that the divided clock is made to be a 1-period based dividing clock or a 2-period based dividing clock.

摘要翻译： 提供了一种延迟锁定环（DLL）和用于在其中产生分频时钟的方法。 在DLL中，用于相位比较的参考频率的宽度可以根据工作频率的大小而改变。 在DLL中，时钟缓冲器接收等于外部时钟的时钟并产生内部时钟。 使能时钟发生器使用为执行预定义的操作生成的命令信号生成1周期使能时钟或2周期使能时钟。 根据从外部输入的地址指令信号生成指令信号。 时钟分频器分隔内部时钟以产生分频时钟。 分频时钟由1周期使能时钟或2周期使能时钟控制，使得分频时钟为1周期分频时钟或2周期分频时钟。

公开(公告)号：US07368964B2

公开(公告)日：2008-05-06

申请号：US11320847

申请日：2005-12-30

申请人： Kyoung-Nam Kim ,  Tae-Yun Kim

发明人： Kyoung-Nam Kim ,  Tae-Yun Kim

IPC分类号： H03L7/06

CPC分类号： G11C7/1072 ,  G11C7/222

摘要： Provided are a delay locked loop (DLL) and a method for generating a divided clock therein. In the DLL, a width of a reference frequency for phase comparison can be changed depending on a magnitude of an operating frequency. In the DLL, a clock buffer receives a clock equal to an external clock and generates an internal clock. An enable clock generator generates a 1-period enable clock or a 2-period enable clock using a command signal generated for performing a predefined operation. The command signal is generated according to an address command signal inputted from an exterior. A clock divider divides the internal clock to generate a divided clock. The divided clock is controlled by the 1-period enable clock or the 2-period enable clock, such that the divided clock is made to be a 1-period based dividing clock or a 2-period based dividing clock.

摘要翻译： 提供了一种延迟锁定环（DLL）和用于在其中产生分频时钟的方法。 在DLL中，用于相位比较的参考频率的宽度可以根据工作频率的大小而改变。 在DLL中，时钟缓冲器接收等于外部时钟的时钟并产生内部时钟。 使能时钟发生器使用为执行预定义的操作生成的命令信号生成1周期使能时钟或2周期使能时钟。 根据从外部输入的地址指令信号生成指令信号。 时钟分频器分隔内部时钟以产生分频时钟。 分频时钟由1周期使能时钟或2周期使能时钟控制，使得分频时钟为1周期分频时钟或2周期分频时钟。

公开(公告)号：US20070187713A1

公开(公告)日：2007-08-16

申请号：US11705433

申请日：2007-02-13

申请人： Tae-Yun Kim

发明人： Tae-Yun Kim

IPC分类号： H01L21/00 ,  H01L33/00

CPC分类号： H01L33/44 ,  H01L33/20 ,  H01L33/32 ,  H01L33/46

摘要： Disclosed are a nitride semiconductor light emitting device and a method for manufacturing the same. The nitride semiconductor light emitting device includes a first nitride layer, an active layer including at least one delta-doping layer on the first nitride layer through delta-doping, and a second nitride layer on the active layer.

摘要翻译： 公开了一种氮化物半导体发光器件及其制造方法。 氮化物半导体发光器件包括第一氮化物层，通过δ掺杂在第一氮化物层上包括至少一个δ-掺杂层的活性层和活性层上的第二氮化物层。