公开(公告)号：US20190280929A1

公开(公告)日：2019-09-12

申请号：US16422787

申请日：2019-05-24

Applicant: Intel Corporation

Inventor： Kent C. Lusted ,  Adee O. Ran

IPC: H04L12/24

Abstract: Technologies for autonegotiation of communications operational modes over copper cable include a network port logic having a communication link coupled to a remote link partner. The network port logic may start an autonegotiation protocol upon reset, when the link is broken, or upon manual renegotiation. The network port logic transmits an autonegotiation page to the remote link partner that indicates single-lane communications ability over copper cable. The network port logic receives an autonegotiation page from the link partner indicating single-lane communications ability over copper cable. If the network port logic and link partner have a common single-lane communication ability, the link may be activated. The autonegotiation pages may be base pages or next pages. The single-lane communication ability may be indicated by one or more bits of the autonegotiation pages. The link may be established at 1 gigabit or 10 gigabits per second. Other embodiments are described and claimed.

公开(公告)号：US09882748B2

公开(公告)日：2018-01-30

申请号：US14580823

申请日：2014-12-23

Applicant: Intel Corporation

Inventor： Adee O. Ran

IPC: H01L25/03 ,  H04L25/03 ,  B01D3/00 ,  C07C51/265 ,  C07C63/26 ,  C08G63/183

CPC classification number: H04L25/03885 ,  B01D3/009 ,  C07C51/265 ,  C07C63/26 ,  C08G63/183

Abstract: Technologies for transmitter equalization in a communication system include reading local transmitter equalization settings from a transmitter equalization register of a first communication device and writing the local transmitter equalization settings to a transmitter equalization register of a second communication device communicatively coupled with the first communication device via a chip-to-chip communication link. Additionally, requested transmitter equalization settings may be read from the transmitter equalization register of the second communication device and written to the transmitter equalization register of the first communication device. The reading and writing process may be repeated for the opposite communication direction and for other communication lane interfaces of the first and second communication devices.

公开(公告)号：US09825736B2

公开(公告)日：2017-11-21

申请号：US14949036

申请日：2015-11-23

Applicant: Intel Corporation

Inventor： Adee O. Ran ,  Kent C. Lusted

IPC: H04L1/20 ,  H04L1/24

CPC classification number: H04L1/248 ,  H04L1/203 ,  H04L1/244

Abstract: One embodiment provides an apparatus. The example apparatus includes a root mean square (RMS) distortion determination module configured to determine an RMS distortion error and a signal to noise and distortion ratio (SNDR), the RMS distortion error determined based, at least in part, on a portion of a transmitted pulse centered at or near a transmitted pulse maximum amplitude and the SNDR determined based, at least in part, on the RMS distortion error.

公开(公告)号：US09722717B2

公开(公告)日：2017-08-01

申请号：US14574482

申请日：2014-12-18

Applicant: Intel Corporation

Inventor： Yoni Landau ,  Assaf Benhamou ,  Adee O. Ran

IPC: H04L12/12 ,  H04J3/06 ,  H04L7/04

CPC classification number: H04J3/0658 ,  H04L7/041 ,  H04L12/12 ,  H04L2007/045 ,  Y02D50/40 ,  Y02D50/42

Abstract: Technologies for robust data transmission include a network port logic having a physical coding sublayer (PCS). The PCS may transmit a series of rapid alignment markers (RAMs) to a link partner, with each RAM indicative of a counter value. The PCS transitions to a sleep state if the counter value equals two and a low power idle (LPI) command is set by an upper-layer client. The PCS transitions to an active state if the counter value equals one and the LPI command is not set. The PCS may receive a low power idle symbol (LI) from the link partner and start a guard timer in response to receipt of the LI symbol. The PCS transitions to a sleep state if the guard timer expires and transitions to the active state if data other than LI is received prior to expiration of the guard timer. Other embodiments are described and claimed.

公开(公告)号：US20160337079A1

公开(公告)日：2016-11-17

申请号：US15154153

申请日：2016-05-13

Applicant: INTEL CORPORATION

Inventor： Adee O. Ran

IPC: H04L1/00 ,  H04L1/20

CPC classification number: H04L1/0045 ,  H04L1/0038 ,  H04L1/0057 ,  H04L1/203 ,  H04L1/245

Abstract: Methods, apparatus, and systems for preventing false packet acceptance in high-speed links. Under one aspect, correctable symbol errors are detected, and determination is made to whether a symbol error rate or ratio (SER) exceeds an SER threshold. In response to detection of such a condition, the link is disconnected or temporarily paused. The value for the SER threshold is determined using a statistical analysis of various link parameters to meet desired performance levels, such as a mean time to false packet acceptance (MTTFPA) of >approximately 15 billion years while providing a mean time to disconnect of >100 years.

Abstract translation: 用于在高速链路中防止虚假包接收的方法，装置和系统。 在一个方面，检测到可校正的符号错误，并且确定符号错误率或比率（SER）是否超过SER阈值。 响应于这种情况的检测，链路断开或暂时暂停。 使用各种链路参数的统计分析来确定SER阈值的值，以满足期望的性能水平，例如>大约150亿年的假包接收的平均时间（MTTFPA），同时提供断开> 100的平均时间 年份。

公开(公告)号：US09344203B2

公开(公告)日：2016-05-17

申请号：US14638507

申请日：2015-03-04

Applicant: Intel Corporation

Inventor： Adee O. Ran

IPC: H04B3/46 ,  H04B17/10 ,  H04L1/20 ,  H04L1/24 ,  G01R31/317 ,  H04L27/04 ,  G01R29/027

CPC classification number: H04B17/104 ,  G01R29/027 ,  G01R31/31709 ,  H04L1/205 ,  H04L1/24 ,  H04L1/248 ,  H04L27/04

Abstract: Methods and test equipment for measuring jitter in a Pulse Amplitude Modulated (PAM) transmitter. Under one procedure, a first two-level PAM signal test pattern is used to measure clock-related jitter separated into random and deterministic components, while a second two-level PAM signal test pattern is used to measure even-odd jitter (EOJ). Under another procedure, A four-level PAM signal test pattern is used to measure jitter-induced noise using distortion analysis. Test equipment are also disclosed for implementing various aspects of the test methods.

Abstract translation: 用于测量脉冲幅度调制（PAM）发射机抖动的方法和测试设备。 在一个程序下，使用第一个两级PAM信号测试模式来测量分为随机和确定性分量的时钟相关抖动，而使用第二个两级PAM信号测试模式来测量偶奇数抖动（EOJ）。 在另一个程序中，使用四电平PAM信号测试模式来测量使用失真分析的抖动引起的噪声。 还公开了用于实施测试方法的各个方面的测试设备。

公开(公告)号：US09338261B2

公开(公告)日：2016-05-10

申请号：US13870201

申请日：2013-04-25

Applicant: Intel Corporation

Inventor： Kent C. Lusted ,  Adee O. Ran

IPC: H04L29/06 ,  H04L12/407 ,  H04L7/10

CPC classification number: H04L69/14 ,  H04L7/10 ,  H04L12/407

Abstract: Methods, apparatus and systems for implementing Physical Media Attachment (PMA) alignment and rapid transition from a link training mode to a data mode for next-generation high-speed Ethernet links including a 100 Gbps Ethernet link. Training frames are transmitted between first and second Ethernet interfaces on opposing ends of the link in a pair-wise manner, with a first training frame being sent from a first Ethernet interface and a second training frame being returned from the second Ethernet interface. The training frames have a length that is different that the length of Physical Media Attachment (PMA) frames, and the returned training frames include receiver readiness status indicia identifying a readiness status of a local receiver port, frame alignment offset data identifying a relative offset between a training frame and a predetermined location in a PMA frame, and countdown data.

Abstract translation: 实现物理媒体附件（PMA）对齐的方法，装置和系统以及从链路训练模式到包括100Gbps以太网链路的下一代高速以太网链路的数据模式的快速转换。 训练帧以成对的方式在链路的相对端上的第一和第二以太网接口之间传输，第一训练帧从第一以太网接口发送，第二训练帧从第二以太接口返回。 训练帧具有与物理媒体附件（PMA）帧的长度不同的长度，并且返回的训练帧包括识别本地接收器端口的准备状态的接收器准备状态标志，标识相对偏移的帧对准偏移数据 训练帧和PMA帧中的预定位置，以及倒计时数据。

公开(公告)号：US09281970B2

公开(公告)日：2016-03-08

申请号：US14180761

申请日：2014-02-14

Applicant: Intel Corporation

Inventor： Adee O. Ran

IPC: H04L25/03 ,  H03M13/09 ,  H04L12/26 ,  H04L1/00

CPC classification number: H04L25/03057 ,  H03M13/09 ,  H04L1/00 ,  H04L1/0057 ,  H04L1/203 ,  H04L43/0847 ,  H04L2001/0096

Abstract: Methods, apparatus, and systems for preventing false packet acceptance in high-speed links. In accordance with one aspect, embodiments are disclosed that facilitate assessing the probability of error bursts in receivers that include decision feedback equalizers (DFEs) and that perform non-contiguous mapping of received bits to frame bits. From this probability, calculation of a mean-time to false packet acceptance (MTTFPA) may be determined, and indication that a projected link MTTFPA is too low can be used to trigger an alert or invoke some safety mechanism. Associated operations may then be performed to ensure the link is prevented from being operated in an unsafe condition under which false packet acceptance may occur.

Abstract translation: 用于在高速链路中防止虚假包接收的方法，装置和系统。 根据一个方面，公开了有助于评估包括判决反馈均衡器（DFE）的接收器中的错误突发的概率并且执行接收的比特到帧比特的非连续映射的实施例。 根据这个概率，可以确定计算平均时间到假包接收（MTTFPA），并且可以使用投影链路MTTFPA太低的指示来触发警报或调用一些安全机制。 然后可以执行相关操作，以确保链路被阻止在不安全状态下操作，在该不安全状态下可能发生错误的分组接受。

公开(公告)号：US11277308B2

公开(公告)日：2022-03-15

申请号：US16847336

申请日：2020-04-13

Applicant: Intel Corporation

Inventor： Kent C. Lusted ,  Adee O. Ran

IPC: H04L41/08 ,  H04L69/24 ,  H04L49/00

Abstract: Technologies for autonegotiation of communications operational modes over copper cable include a network port logic having a communication link coupled to a remote link partner. The network port logic may start an autonegotiation protocol upon reset, when the link is broken, or upon manual renegotiation. The network port logic transmits an autonegotiation page to the remote link partner that indicates single-lane communications ability over copper cable. The network port logic receives an autonegotiation page from the link partner indicating single-lane communications ability over copper cable. If the network port logic and link partner have a common single-lane communication ability, the link may be activated. The autonegotiation pages may be base pages or next pages. The single-lane communication ability may be indicated by one or more bits of the autonegotiation pages. The link may be established at 1 gigabit or 10 gigabits per second. Other embodiments are described and claimed.

公开(公告)号：US20200244535A1

公开(公告)日：2020-07-30

申请号：US16847336

申请日：2020-04-13

Applicant: Intel Corporation

Inventor： Kent C. Lusted ,  Adee O. Ran

IPC: H04L12/24

Abstract: Technologies for autonegotiation of communications operational modes over copper cable include a network port logic having a communication link coupled to a remote link partner. The network port logic may start an autonegotiation protocol upon reset, when the link is broken, or upon manual renegotiation. The network port logic transmits an autonegotiation page to the remote link partner that indicates single-lane communications ability over copper cable. The network port logic receives an autonegotiation page from the link partner indicating single-lane communications ability over copper cable. If the network port logic and link partner have a common single-lane communication ability, the link may be activated. The autonegotiation pages may be base pages or next pages. The single-lane communication ability may be indicated by one or more bits of the autonegotiation pages. The link may be established at 1 gigabit or 10 gigabits per second. Other embodiments are described and claimed.