公开(公告)号：US20180188797A1

公开(公告)日：2018-07-05

申请号：US15394631

申请日：2016-12-29

Applicant: Intel Corporation

Inventor： Zhe WANG ,  Christopher B. WILKERSON ,  Zeshan A. CHISHTI

IPC: G06F1/32 ,  G06F13/42

CPC classification number: G06F1/3287 ,  G06F1/3275 ,  G06F13/4282 ,  G06F2213/0026 ,  Y02D10/14 ,  Y02D10/151

Abstract: An apparatus is described. The apparatus includes power management logic circuitry to implement a power management scheme for a link in which a prior history of the link's idle time behavior is used to determine a first estimate of the link's power consumption while idle in a higher power state and determine a second estimate of the link's power consumption while idle in a lower power state. The first and second estimates are used to determine an idle time for the link at which the link is transitioned to the lower power state.