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公开(公告)号：US11621720B2
公开(公告)日：2023-04-04
申请号：US17108469
申请日：2020-12-01
Applicant: International Business Machines Corporation
Inventor： Peter Mueller , Thomas Morf , Pier Andrea Francese , Marcel A. Kossel
IPC: H03M1/12 , G06N10/00 , H01L27/18 , G01R33/035 , H03M1/66 , H04B10/70 , G06N10/40 , G01R33/24 , G01N24/12 , G01R33/32
Abstract: Systems and methods directed to a quantum processing apparatus are provided. The apparatus comprises M solid-state qubits, where M>1, and control electronics, which are connected to the solid-state qubits. The control electronics comprise one or more qubit readout circuits, where each of the qubit readout circuits is connected to at least one of the solid-state qubits and comprises a downsampling analog-to-digital converter (hereafter DSADC). Each DSADC is configured to downsample analog signals obtained from the at least one of the solid-state qubits. Such a DSADC operates in the nth Nyquist zone of the spectrum of the analog signals obtained, so as to down-convert such analog signals from the nth Nyquist zone to the mth Nyquist zone of the spectrum, where n>m≥1, prior to sampling the analog signals to convert them into digital signals, in operation. One or more embodiments of the invention are further directed to a related method of operating such a quantum processing apparatus.
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公开(公告)号：US11418026B1
公开(公告)日：2022-08-16
申请号：US17208090
申请日：2021-03-22
Applicant: International Business Machines Corporation
Inventor： Thomas Morf , Pier Andrea Francese
Abstract: An electrostatic protection device for protecting an input port of an electronic circuit. The electrostatic protection device includes a first stacked coil, a second stacked coil, and an input terminal, wherein the second stacked coil is inductively coupled to the first stacked coil. The first stacked coil comprises a first coil input connected to the input terminal, a first coil output port connected to a lower frequency ESD protection circuit, and a first coil termination port connected to a termination load, and wherein the lower frequency ESD protection circuit comprises a lower frequency output. The second stacked coil comprises an output port connected to a higher frequency ESD protection circuit, and wherein the higher frequency ESD protection circuit comprises a higher frequency output. The electrostatic protection device comprises a summation circuit configured for outputting a summation of the higher frequency output and the lower frequency output.
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13.发明授权公开(公告)号：US11410068B2
公开(公告)日：2022-08-09
申请号：US16260290
申请日：2019-01-29
Applicant: International Business Machines Corporation
Inventor： Peter Mueller , Thomas Morf
Abstract: A quantum processing system may include one or more superconducting qubits and a qubit controller for controlling the one or more qubits. The qubit controller includes a radio frequency generation unit comprising electronic components, which are altogether configured to generate modulated RF signals. The controller also includes a phase locked loop unit maintaining a reference clock for two or more of the components of the RF generation unit, and a timing controller including an absolute timing register, the latter accessed by the reference clock, in operation. The qubit controller comprises a sequencer coupled to the timing controller to synchronize said two or more of said components by maintaining a coherent signal for said two or more of said components, the coherent signal phase matched to the one or more qubits, to drive and/or read out the one or more qubits via modulated signals generated by the synchronized components, in operation.
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公开(公告)号：US20210175892A1
公开(公告)日：2021-06-10
申请号：US17108469
申请日：2020-12-01
Applicant: International Business Machines Corporation
Inventor： Peter Mueller , Thomas Morf , Pier Andrea Francese , Marcel A. Kossel
Abstract: Systems and methods directed to a quantum processing apparatus are provided. The apparatus comprises M solid-state qubits, where M>1, and control electronics, which are connected to the solid-state qubits. The control electronics comprise one or more qubit readout circuits, where each of the qubit readout circuits is connected to at least one of the solid-state qubits and comprises a downsampling analog-to-digital converter (hereafter DSADC). Each DSADC is configured to downsample analog signals obtained from the at least one of the solid-state qubits. Such a DSADC operates in the nth Nyquist zone of the spectrum of the analog signals obtained, so as to down-convert such analog signals from the nth Nyquist zone to the mth Nyquist zone of the spectrum, where n>m≥1, prior to sampling the analog signals to convert them into digital signals, in operation. One or more embodiments of the invention are further directed to a related method of operating such a quantum processing apparatus.
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公开(公告)号：US20190245345A1
公开(公告)日：2019-08-08
申请号：US15891052
申请日：2018-02-07
Applicant: International Business Machines Corporation
Inventor： Pier Andrea Francese , Thomas Morf
Abstract: Aspects of the invention provide for an electrostatic protection device for protecting an input port of an electronic circuit. The electrostatic protection device includes a stacked coil assembly with four ports. The electrostatic protection device further includes a human body model ESD protection circuit, a charge device model ESD protection circuit, and an impedance matching circuit. The human body model ESD protection circuit, the charge device model ESD protection circuit, and the impedance matching circuit are connected to separate ports selected from the four ports.
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Patent Agency Ranking
公开(公告)号：US09297704B2
公开(公告)日：2016-03-29
申请号：US14158878
申请日：2014-01-20
Applicant: International Business Machines Corporation
Inventor： Dan Corcos , Michel Despont , Danny Elad , Thomas Morf , Mehmet Soyuer
CPC classification number: G01K7/015
Abstract: A method and circuit for determining a working temperature of a device, the method comprising: providing a first signal to a device having a temperature-sensitive characteristic; performing a function on the first signal by the device; demodulating a second signal output by the device to obtain a third signal thus generating a signal having reduced 1/f noise component; and based upon the first signal and the second signal, determining a working temperature of the device.
Abstract translation: 一种用于确定装置的工作温度的方法和电路，所述方法包括：向具有温度敏感特性的装置提供第一信号; 通过所述装置对所述第一信号执行功能; 解调由所述设备输出的第二信号以获得第三信号，从而产生具有降低的1 / f噪声分量的信号; 并且基于第一信号和第二信号，确定装置的工作温度。
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公开(公告)号：US20150204731A1
公开(公告)日：2015-07-23
申请号：US14158878
申请日：2014-01-20
Applicant: International Business Machines Corporation
Inventor： Dan Corcos , Michel Despont , Danny Elad , Thomas Morf , Mehmet Soyuer
IPC: G01K7/01
CPC classification number: G01K7/015
Abstract: A method and circuit for determining a working temperature of a device, the method comprising: providing a first signal to a device having a temperature-sensitive characteristic; performing a function on the first signal by the device; demodulating a second signal output by the device to obtain a third signal thus generating a signal having reduced 1/f noise component; and based upon the first signal and the second signal, determining a working temperature of the device.
Abstract translation: 一种用于确定装置的工作温度的方法和电路，所述方法包括：向具有温度敏感特性的装置提供第一信号; 通过所述装置对所述第一信号执行功能; 解调由所述设备输出的第二信号以获得第三信号，从而产生具有降低的1 / f噪声分量的信号; 并且基于第一信号和第二信号，确定装置的工作温度。
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公开(公告)号：US20240154620A1
公开(公告)日：2024-05-09
申请号：US18053940
申请日：2022-11-09
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor： Abdullah Serdar Yonar , Pier Andrea Francese , Marcel A. Kossel , Mridula Prathapan , Matthias Braendli , Thomas Morf
IPC: H03M1/50
CPC classification number: H03M1/50
Abstract: The invention is notably directed to a voltage-to-time converter comprising a first interleaving stage configured to perform a sampling of an input voltage, thereby generating a first set of sampled voltage signals. The first interleaving stage is further configured to perform a first voltage-to-time conversion in an interleaved manner, thereby generating a first set of time-interleaved signals in the time domain. A second interleaving stage is configured to perform a time-to-voltage conversion of the first set of time-interleaved signals, thereby generating a second set of sampled voltage signals. The second interleaving stage is further configured perform a second voltage-to-time conversion in an interleaved manner, thereby generating a second set of time-interleaved signals in the time domain.
The invention further concerns a related design structure and a related method.-
公开(公告)号：US10742026B2
公开(公告)日：2020-08-11
申请号：US15891052
申请日：2018-02-07
Applicant: International Business Machines Corporation
Inventor： Pier Andrea Francese , Thomas Morf
Abstract: Aspects of the invention provide for an electrostatic protection device for protecting an input port of an electronic circuit. The electrostatic protection device includes a stacked coil assembly with four ports. The electrostatic protection device further includes a human body model ESD protection circuit, a charge device model ESD protection circuit, and an impedance matching circuit. The human body model ESD protection circuit, the charge device model ESD protection circuit, and the impedance matching circuit are connected to separate ports selected from the four ports.
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20.发明授权公开(公告)号：US10733523B2
公开(公告)日：2020-08-04
申请号：US16686761
申请日：2019-11-18
Applicant: International Business Machines Corporation
Inventor： Peter Mueller , Thomas Morf
Abstract: A quantum computer hardware apparatus may include a first stage, which is connected to one or more signal generators, and a second stage adapted to be cooled down at a lower temperature than the first stage. Superconducting qubits are arranged in the second stage. The signal generators are configured, each, to generate radio frequency (RF) signals to drive the qubits, in operation. The apparatus may further include an intermediate stage between the first stage and the second stage, wherein the intermediate stage comprises one or more coolable filters, the latter configured for thermalizing RF signals from the signal generators. Related methods for thermalizing radio frequency signals in a quantum computer hardware apparatus are also disclosed.
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