公开(公告)号：US20210367629A1

公开(公告)日：2021-11-25

申请号：US17393564

申请日：2021-08-04

Applicant: Intel Corporation

Inventor： Ashoke Ravi ,  Benjamin Jann ,  Satwik Patnaik ,  Alexandros Margomenos ,  Igal Kushnir ,  Elan Banin ,  Ofir Degani

IPC: H04B1/04 ,  H03L7/24 ,  G01R27/06 ,  H01Q3/40

Abstract: Techniques are described related to digital radio control and operation. The various techniques described herein enable high-frequency local oscillator (LO) signal generation using injection locked cock multipliers (ILCMs). The techniques also include the use of LO signals for carrier aggregation applications for phased array front ends. Furthermore, the disclosed techniques include the use of array element-level control using per-chain DC-DC converters. Still further, the disclosed techniques include the use of adaptive spatial filtering and optimal combining of analog-to-digital converters (ADCs) to maximize dynamic range in digital beamforming systems.

公开(公告)号：US12255653B2

公开(公告)日：2025-03-18

申请号：US17356564

申请日：2021-06-24

Applicant: Intel Corporation

Inventor： Ali Azam ,  Ashoke Ravi ,  Benjamin Jann

IPC: H03K5/00 ,  G06F7/68 ,  H03K5/02

Abstract: A digital clock multiplier (DCM) circuit including: a plurality of power amplifier (PA) rows, wherein each PA row comprises a plurality of cascade switched capacitor power amplifiers (SCPA) unit cells configured to: receive a phase shift of a driving clock phase; and one or more processors configured to: disable of one or more of the plurality of cascade SCPA unit cells based on a frequency of the phase shift; generate an output signal for each of the cascade SCPA unit cells; and combine the output signal for each of the cascade SCPA unit cells to generate an PA row output signal.

公开(公告)号：US20220278439A1

公开(公告)日：2022-09-01

申请号：US17739880

申请日：2022-05-09

Applicant: Intel Corporation

Inventor： Sidharth Dalmia ,  Jonathan Jensen ,  Ozgur Inac ,  Trang Thai ,  William J. Lambert ,  Benjamin Jann

IPC: H01Q1/24 ,  H01Q9/04 ,  H01Q1/22

Abstract: Disclosed herein are integrated circuit (IC) packages, antenna boards, antenna modules, and communication devices (e.g., for millimeter wave communications). For example, in some embodiments, an antenna module may include: a logic die; a radio frequency front-end (RFFE) die in electrical communication with the logic die; and an antenna patch, wherein the RFFE die is closer to the antenna patch than the logic die is to the antenna patch.

公开(公告)号：US11374557B2

公开(公告)日：2022-06-28

申请号：US17255291

申请日：2018-12-28

Applicant: Intel Corporation

Inventor： Benjamin Jann ,  Ashoke Ravi ,  Satwik Patnaik

IPC: H03B27/00 ,  H03B19/14 ,  H03K5/14 ,  H03B5/12 ,  H03M1/50

Abstract: Techniques are described related to digital radio control, partitioning, and operation. The various techniques described herein enable high-frequency local oscillator signal generation and frequency multiplication using radio-frequency (RF) digital to analog converters (RFDACs). The use of these components and others described throughout this disclosure allow for the realization of various improvements. For example, digital, analog, and hybrid beamforming control are implemented and the newly-enabled digital radio architecture partitioning enables radio components to be pushed to the radio head, allowing for the omission of high frequency cables and/or connectors.

公开(公告)号：US20210391853A1

公开(公告)日：2021-12-16

申请号：US17255291

申请日：2018-12-28

Applicant: Intel Corporation

Inventor： Benjamin Jann ,  Ashoke Ravi ,  Satwik Patnaik ,  Elan Banin ,  Ofir Degani ,  Nebil Tanzi ,  Brandon Davis ,  Igal Kushnir ,  Jonathan Jensen ,  Sidharth Dalmia ,  Peter Pawliuk

IPC: H03K5/14 ,  H03B19/14 ,  H03B27/00 ,  H03B5/12 ,  H03M1/50

Abstract: Techniques are described related to digital radio control, partitioning, and operation. The various techniques described herein enable high-frequency local oscillator signal generation and frequency multiplication using radio-frequency (RF) digital to analog converters (RFDACs). The use of these components and others described throughout this disclosure allow for the realization of various improvements. For example, digital, analog, and hybrid beamforming control are implemented and the newly-enabled digital radio architecture partitioning enables radio components to be pushed to the radio head, allowing for the omission of high frequency cables and/or connectors.

公开(公告)号：US11121731B2

公开(公告)日：2021-09-14

申请号：US16550574

申请日：2019-08-26

Applicant: Intel Corporation

Inventor： Ashoke Ravi ,  Benjamin Jann ,  Satwik Patnaik ,  Elan Banin ,  Igal Kushnir ,  Ofir Degani ,  Alexandros Margomenos

IPC: H04B1/04 ,  H03L7/24 ,  G01R27/06 ,  H01Q3/40

Abstract: Techniques are described related to digital radio control and operation. The various techniques described herein enable high-frequency local oscillator (LO) signal generation using injection locked cock multipliers (ILCMs). The techniques also include the use of LO signals for carrier aggregation applications for phased array front ends. Furthermore, the disclosed techniques include the use of array element-level control using per-chain DC-DC converters. Still further, the disclosed techniques include the use of adaptive spatial filtering and optimal combining of analog-to-digital converters (ADCs) to maximize dynamic range in digital beamforming systems.