公开(公告)号：US11494330B2

公开(公告)日：2022-11-08

申请号：US17354163

申请日：2021-06-22

Applicant: Intel Corporation

Inventor： Bharat Pillilli ,  Saravana Priya Ramanathan ,  Reshma Lal

IPC: G06F15/78 ,  G11C17/16 ,  G11C29/00

Abstract: A computer platform is disclosed. The computer platform comprises a non-volatile memory to store fuse override data; and a system on chip (SOC), coupled to the non-volatile memory, including a fuse memory to store fuse data and security micro-controller to receive the fuse override data and perform a fuse override to overwrite the fuse data stored in the fuse memory with the fuse override data.

公开(公告)号：US11983260B2

公开(公告)日：2024-05-14

申请号：US18296679

申请日：2023-04-06

Applicant: Intel Corporation

Inventor： Bharat Pillilli ,  David W. Palmer ,  Nikola Radovanovic

IPC: G06F21/33 ,  G06F21/44 ,  G06F21/57 ,  G06F21/73

CPC classification number: G06F21/33 ,  G06F21/44 ,  G06F21/572 ,  G06F21/73

Abstract: A computer platform is disclosed. The computer platform comprises a central processing unit (CPU) including at least one socket having a plurality of tiles and control circuitry to partition the socket into a plurality of sub-sockets and assign a unique identity to each of the plurality of sub-sockets for security verification, wherein each sub-socket comprises at least one of the plurality of tiles to operate as a cluster of resources.

公开(公告)号：US20240095315A1

公开(公告)日：2024-03-21

申请号：US18474081

申请日：2023-09-25

Applicant: Intel Corporation

Inventor： Katalin Bartfai-Walcott ,  Mariusz Oriol ,  Vasudevan Srinivasan ,  Peggy Irelan ,  Mariusz Stepka ,  Kaitlin Murphy ,  Bharat Pillilli ,  Mark Baldwin ,  Mateusz Bronk ,  Fariaz Karim ,  Arkadiusz Berent ,  Vasuki Chilukuri

IPC: G06F21/10 ,  G06F9/455

CPC classification number: G06F21/107 ,  G06F9/45558 ,  G06F2009/4557

Abstract: Methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to implement license management solutions for software defined silicon (SDSi) products are disclosed. Example license management solutions disclosed herein include, but are not limited to, virtual resource migration using SDSi, resource configuration management using SDSi, hardware self-configuration using SDSi, reduced footprint agents using SDSi, performing SDSi usage evaluation and corresponding license transfer responsive to detected and/or predicted failures, transferring node locked SDSi licenses, transfer of SDSi licenses without a trusted license server, community license generation, expirable SDSi licenses via a reliable clock, non-node locked licenses via blockchain, and activating hardware features with a pre-generated hardware license.

公开(公告)号：US20220405231A1

公开(公告)日：2022-12-22

申请号：US17877531

申请日：2022-07-29

Applicant: Intel Corporation

Inventor： Bharat Pillilli ,  Saravana Priya Ramanathan ,  Reshma Lal

IPC: G06F15/78 ,  G11C17/16 ,  G11C29/00

Abstract: A computer platform is disclosed. The computer platform comprises a non-volatile memory to store fuse override data; and a system on chip (SOC), coupled to the non-volatile memory, including a fuse memory to store fuse data and security micro-controller to receive the fuse override data and perform a fuse override to overwrite the fuse data stored in the fuse memory with the fuse override data.

公开(公告)号：US20210319088A1

公开(公告)日：2021-10-14

申请号：US17355378

申请日：2021-06-23

Applicant: Intel Corporation

Inventor： Bharat Pillilli ,  David W. Palmer ,  Nikola Radovanovic

IPC: G06F21/33 ,  G06F21/73 ,  G06F21/57 ,  G06F21/44

Abstract: A computer platform is disclosed. The computer platform comprises a central processing unit (CPU) including at least one socket having a plurality of tiles and control circuitry to partition the socket into a plurality of sub-sockets and assign a unique identity to each of the plurality of sub-sockets for security verification, wherein each sub-socket comprises at least one of the plurality of tiles to operate as a cluster of resources.