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公开(公告)号：US20210312044A1
公开(公告)日：2021-10-07
申请号：US17354125
申请日：2021-06-22
申请人： Intel Corporation
发明人： Michael Berger , Xiaoyu Ruan , Purushottam Goel , Mahesh Natu , Bharat Pillilli
摘要： An apparatus comprising a computer platform, including a central processing unit (CPU) comprising a first security engine to perform security operations at the CPU and a chipset comprising a second security engine to perform security operations at the chipset, wherein the first security engine and the second security engine establish a secure channel session between the CPU and the chipset to secure data transmitted between the CPU and the chipset.
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公开(公告)号：US20220004398A1
公开(公告)日：2022-01-06
申请号：US17481734
申请日：2021-09-22
申请人： Intel Corporation
摘要： An apparatus is disclosed. The apparatus comprises an integrated circuit (IC) package including a plurality of ICs; a non-volatile memory to store configuration information comprising settings that define an operation of the plurality ICs and a configuration register to receive configuration bits from the non-volatile memory representing a final configuration for the package
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公开(公告)号：US20210311904A1
公开(公告)日：2021-10-07
申请号：US17354163
申请日：2021-06-22
申请人： Intel Corporation
摘要： A computer platform is disclosed. The computer platform comprises a non-volatile memory to store fuse override data; and a system on chip (SOC), coupled to the non-volatile memory, including a fuse memory to store fuse data and security micro-controller to receive the fuse override data and perform a fuse override to overwrite the fuse data stored in the fuse memory with the fuse override data.
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公开(公告)号：US20230342459A1
公开(公告)日：2023-10-26
申请号：US18339571
申请日：2023-06-22
申请人： Intel Corporation
发明人： Michael Berger , Xiaoyu Ruan , Purushottam Goel , Mahesh Natu , Bharat Pillilli
CPC分类号： G06F21/556 , G06F21/554 , G06F21/572
摘要： An apparatus comprising a computer platform, including a central processing unit (CPU) comprising a first security engine to perform security operations at the CPU and a chipset comprising a second security engine to perform security operations at the chipset, wherein the first security engine and the second security engine establish a secure channel session between the CPU and the chipset to secure data transmitted between the CPU and the chipset.
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公开(公告)号：US11693940B2
公开(公告)日：2023-07-04
申请号：US17355378
申请日：2021-06-23
申请人： Intel Corporation
CPC分类号： G06F21/33 , G06F21/44 , G06F21/572 , G06F21/73
摘要： A computer platform is disclosed. The computer platform comprises a central processing unit (CPU) including at least one socket having a plurality of tiles and control circuitry to partition the socket into a plurality of sub-sockets and assign a unique identity to each of the plurality of sub-sockets for security verification, wherein each sub-socket comprises at least one of the plurality of tiles to operate as a cluster of resources.
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公开(公告)号：US11940944B2
公开(公告)日：2024-03-26
申请号：US17877531
申请日：2022-07-29
申请人： Intel Corporation
CPC分类号： G06F15/7853 , G11C17/16 , G11C29/789 , G06F2212/202
摘要： A computer platform is disclosed. The computer platform comprises a non-volatile memory to store fuse override data; and a system on chip (SOC), coupled to the non-volatile memory, including a fuse memory to store fuse data and security micro-controller to receive the fuse override data and perform a fuse override to overwrite the fuse data stored in the fuse memory with the fuse override data.
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公开(公告)号：US11741227B2
公开(公告)日：2023-08-29
申请号：US17354125
申请日：2021-06-22
申请人： Intel Corporation
发明人： Michael Berger , Xiaoyu Ruan , Purushottam Goel , Mahesh Natu , Bharat Pillilli
CPC分类号： G06F21/556 , G06F21/554 , G06F21/572
摘要： An apparatus comprising a computer platform, including a central processing unit (CPU) comprising a first security engine to perform security operations at the CPU and a chipset comprising a second security engine to perform security operations at the chipset, wherein the first security engine and the second security engine establish a secure channel session between the CPU and the chipset to secure data transmitted between the CPU and the chipset.
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公开(公告)号：US20230244772A1
公开(公告)日：2023-08-03
申请号：US18296679
申请日：2023-04-06
申请人： Intel Corporation
CPC分类号： G06F21/33 , G06F21/44 , G06F21/572 , G06F21/73
摘要： A computer platform is disclosed. The computer platform comprises a central processing unit (CPU) including at least one socket having a plurality of tiles and control circuitry to partition the socket into a plurality of sub-sockets and assign a unique identity to each of the plurality of sub-sockets for security verification, wherein each sub-socket comprises at least one of the plurality of tiles to operate as a cluster of resources.
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公开(公告)号：US11494330B2
公开(公告)日：2022-11-08
申请号：US17354163
申请日：2021-06-22
申请人： Intel Corporation
摘要： A computer platform is disclosed. The computer platform comprises a non-volatile memory to store fuse override data; and a system on chip (SOC), coupled to the non-volatile memory, including a fuse memory to store fuse data and security micro-controller to receive the fuse override data and perform a fuse override to overwrite the fuse data stored in the fuse memory with the fuse override data.
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公开(公告)号：US11983260B2
公开(公告)日：2024-05-14
申请号：US18296679
申请日：2023-04-06
申请人： Intel Corporation
CPC分类号： G06F21/33 , G06F21/44 , G06F21/572 , G06F21/73
摘要： A computer platform is disclosed. The computer platform comprises a central processing unit (CPU) including at least one socket having a plurality of tiles and control circuitry to partition the socket into a plurality of sub-sockets and assign a unique identity to each of the plurality of sub-sockets for security verification, wherein each sub-socket comprises at least one of the plurality of tiles to operate as a cluster of resources.
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