公开(公告)号：US20210375616A1

公开(公告)日：2021-12-02

申请号：US17308813

申请日：2021-05-05

Applicant: Intel Corporation

Inventor： Marie Krysak ,  James Blackwell ,  Lauren Doyle ,  Brian Zaccheo ,  Patrick Theofanis ,  Michael Robinson ,  Florian Gstrein

IPC: H01L21/027 ,  G03F7/004 ,  H01L23/522 ,  H01L21/768

Abstract: Techniques, structures, and materials related to extreme ultraviolet (EUV) lithography are discussed. Multiple patterning inclusive of first patterning a grating of parallel lines and second patterning utilizing EUV lithography to form plugs in the grating, and optional trimming of the plugs may be employed. EUV resists, surface treatments, resist additives, and optional processing inclusive of plug healing, angled etch processing, electric field enhanced post exposure bake are described, which provide improved processing reliability, feature definition, and critical dimensions.

公开(公告)号：US08969165B2

公开(公告)日：2015-03-03

申请号：US14178166

申请日：2014-02-11

Applicant: Intel Corporation

Inventor： Willy Rachmady ,  James Blackwell

IPC: H01L21/44 ,  H01L29/51 ,  H01L21/768 ,  H01L29/66

CPC classification number: H01L29/511 ,  H01L21/76834 ,  H01L21/76897 ,  H01L29/66545

Abstract: A semiconductor device comprising a substrate having a transistor that includes a metal gate structure; a first oxide layer formed over the substrate; a silane layer formed on the first oxide layer; and a non-conductive metal oxide layer grown on the metal gate structure, wherein the silane layer inhibits nucleation and growth of the non-conductive metal oxide layer.

Abstract translation: 一种半导体器件，包括具有包括金属栅极结构的晶体管的衬底; 形成在所述基板上的第一氧化物层; 形成在所述第一氧化物层上的硅烷层; 以及在所述金属栅极结构上生长的非导电金属氧化物层，其中所述硅烷层抑制所述非导电金属氧化物层的成核和生长。