公开(公告)号：US11720401B2

公开(公告)日：2023-08-08

申请号：US16832372

申请日：2020-03-27

Applicant: Intel Corporation

Inventor： Pannerkumar Rajagopal ,  Murali R Iyengar ,  Karunakara Kotary ,  Ovais Pir ,  Sagar C Pawar ,  Prakash Pillai ,  Raghavendra N ,  Aneesh A Tuljapurkar

IPC: G06F9/4401 ,  G06F9/50 ,  G06F9/54 ,  G06F12/1009 ,  G06T1/60

CPC classification number: G06F9/5016 ,  G06F9/4406 ,  G06F9/544 ,  G06F12/1009 ,  G06T1/60

Abstract: Described is a system where memory can be allocated for use by an adapter pre-boot and preserved for use post-boot. A BIOS can allocate for pre-boot hardware operations (e.g., graphics drivers, framebuffers, etc.) and mark this allocated memory as preserved. An indication of the allocated memory can be provided for an OS, such that post-boot, the OS can reclaim and reallocate this memory.

公开(公告)号：US20220391003A1

公开(公告)日：2022-12-08

申请号：US17702504

申请日：2022-03-23

Applicant: Intel Corporation

Inventor： Pannerkumar Rajagopal ,  Raghavendra N ,  Ovais Pir ,  Prakash Pillai ,  Sagar C. Pawar

IPC: G06F1/3231

Abstract: A power-management scheme where when a system-on-chip (SoC) is in an active state, control and monitoring logic or circuitry turns off all wake logic or circuits for various associated intellectual property (IP) blocks. Based on user defined operating system power manager (OSPM) policies, OSPM kicks off an interrupt to the control and monitoring logic or circuitry to turn off or power gate the wake logic for individual IP blocks in the SoC. As such, wake logic that are idle in active state (e.g., S0 state) and would otherwise draw power in the S0 state are now turned off, thus saving power and/or extending battery life for the system. When the SoC is in a low power state, then the control and monitoring logic or circuitry selectively turns on the wake logic for the associated IP blocks based on detected user presence for the computing system having the SoC.