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公开(公告)号:US11237626B2
公开(公告)日:2022-02-01
申请号:US16662403
申请日:2019-10-24
Applicant: Intel Corporation
Inventor: Ravindra A. Babu , Sashank Ms , Satyanantha R. Musunuri , Sagar C. Pawar , Kalyan K. Kaipa , Vijayakumar Balakrishnan , Sameer Kp
Abstract: When the speed of head movement exceeds the processing capability of the system, a reduced depiction is displayed. As one example, the resolution may be reduced using coarse pixel shading in order to create a new depiction at the speed of head movement. In accordance with another embodiment, only the region the user is looking at is processed in full resolution and the remainder of the depiction is processed at lower resolution. In still another embodiment, the background depictions may be blurred or grayed out to reduce processing time.
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公开(公告)号:US11206390B2
公开(公告)日:2021-12-21
申请号:US16696050
申请日:2019-11-26
Applicant: Intel Corporation
Inventor: Ravindra A. Babu , Sagar C. Pawar , Satyanantha R. Musunuri , Sashank Ms , Kalyan K. Kaipa
IPC: G09G5/00 , H04N13/332 , G06T1/20 , H04N13/327 , G06T15/00 , G06T11/00 , H04N13/344
Abstract: Systems, apparatuses and methods may provide for technology that includes a substrate, and a display pipeline coupled to the substrate. The display pipeline may to barrel an initial image to form a barreled image.
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公开(公告)号:US20200225994A1
公开(公告)日:2020-07-16
申请号:US16832372
申请日:2020-03-27
Applicant: Intel Corporation
Inventor: Pannerkumar Rajagopal , Murali R. Iyengar , Karunakara Kotary , Ovais Pir , Sagar C. Pawar , Prakash Pillai , Raghavendra N. , Aneesh A. Tuljapurkar
IPC: G06F9/50 , G06F9/4401 , G06F9/54 , G06F12/1009 , G06T1/60
Abstract: Described is a system where memory can be allocated for use by an adapter pre-boot and preserved for use post-boot. A BIOS can allocate for pre-boot hardware operations (e.g., graphics drivers, framebuffers, etc.) and mark this allocated memory as preserved. An indication of the allocated memory can be provided for an OS, such that post-boot, the OS can reclaim and reallocate this memory.
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公开(公告)号:US10652364B2
公开(公告)日:2020-05-12
申请号:US15393159
申请日:2016-12-28
Applicant: Intel Corporation
Inventor: Sagar C. Pawar , Ravindra A. Babu , Satyanantha R. Musunuri , Sashank Ms
Abstract: Embodiments include apparatuses, methods, and systems including a communication aggregator having a first interface to communicate with a host through a first link based on a first protocol, a second interface coupled to the first interface to communicate with a display device through a second link based on the first protocol, and a third interface coupled to the first interface to communicate with a sensor through a third link coupled to the third interface based on a second protocol. Moreover, the host is to communicate with the display device through the first link based on the first protocol, and the second link based on the first protocol; and the sensor is to communicate with the host through the third link based on the second protocol, and the first link based on the first protocol. Other embodiments may also be described and claimed.
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公开(公告)号:US20180286022A1
公开(公告)日:2018-10-04
申请号:US15477045
申请日:2017-04-01
Applicant: Intel Corporation
Inventor: Ravindra A. Babu , Sagar C. Pawar , Satyanantha R. Musunuri , Sashank Ms , Kalyan K. Kaipa
Abstract: Systems, apparatuses and methods may provide for technology that includes a substrate, and a display pipeline coupled to the substrate. The display pipeline may barrel an initial image to form a barreled image. In one example, the display pipeline further performs chromatic correction of the initial image.
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公开(公告)号:US20180278075A1
公开(公告)日:2018-09-27
申请号:US15467874
申请日:2017-03-23
Applicant: Intel Corporation
Inventor: Sagar C. Pawar , Anantha Narayanan , Ravindra A. Babu , Aneesh A. Tuljapurkar
IPC: H02J7/00
CPC classification number: H02J7/0068 , G06F1/266 , G06F1/3212 , H02J7/0047 , H02J7/0054 , H02J7/027 , H02J2007/005 , H02J2007/0062 , H02J2007/0096
Abstract: An apparatus system is provided which comprises: a first input/output (I/O) port; a second I/O port; circuitry to generate (i) a first signal at a first voltage level and (ii) a second signal at a second voltage level; and switching circuitry to selectively supply any one of the first signal or the second signal to any one of the first I/O port or the second I/O port.
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公开(公告)号:US20180183898A1
公开(公告)日:2018-06-28
申请号:US15393159
申请日:2016-12-28
Applicant: Intel Corporation
Inventor: Sagar C. Pawar , Ravindra A. Babu , Satyanantha R. Musunuri , Sashank Ms
Abstract: Embodiments include apparatuses, methods, and systems including a communication aggregator having a first interface to communicate with a host through a first link based on a first protocol, a second interface coupled to the first interface to communicate with a display device through a second link based on the first protocol, and a third interface coupled to the first interface to communicate with a sensor through a third link coupled to the third interface based on a second protocol. Moreover, the host is to communicate with the display device through the first link based on the first protocol, and the second link based on the first protocol; and the sensor is to communicate with the host through the third link based on the second protocol, and the first link based on the first protocol. Other embodiments may also be described and claimed.
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公开(公告)号:US20220198022A1
公开(公告)日:2022-06-23
申请号:US17132844
申请日:2020-12-23
Applicant: Intel Corporation
Inventor: Sagar C. Pawar , Pannerkumar Rajagopal , Raghavendra N , Prakash Pillai , Ovais Pir
IPC: G06F21/57 , G06F1/18 , G06F21/32 , G06F1/3215 , G06F1/26
Abstract: A power-up scheme for a computing system that applies a biometric sensor (e.g., a fingerprint sensor, eye sensor, etc.) to authenticate a user before enabling power-up of the computing system or to resume transition to a power state (e.g., one of the power states defined by the Advance Configuration and Power Interface (ACPI)). Output of the biometric sensor is compared against data of a registered user for a match. The data may include an original copy of an output of the biometric sensor saved in a non-volatile memory (e.g., serial peripheral interface (SPI) flash device). If a match exists, a logic in the computing system will allow the computing system to power-up. In the absence of a match, the computing system will not be powered up. In some examples, battery charging is also disabled if the match is not found.
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公开(公告)号:US11281764B2
公开(公告)日:2022-03-22
申请号:US16457561
申请日:2019-06-28
Applicant: INTEL CORPORATION
Inventor: Sagar C. Pawar , Panner Kumar , Karunakara Kotary , Ovais F. Pir
IPC: G06F21/44 , G06F21/81 , G01R31/3835 , G01R31/36 , H04L9/32 , G06F9/4401
Abstract: In some examples, an apparatus to authenticate a battery includes a battery voltage monitor to monitor a voltage of the battery. The apparatus to authenticate the battery also includes a voltage source regulator to filter the voltage of the battery and provide the filtered voltage to turn on circuitry to be used to authenticate the battery.
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公开(公告)号:US20200169723A1
公开(公告)日:2020-05-28
申请号:US16696050
申请日:2019-11-26
Applicant: Intel Corporation
Inventor: Ravindra A. Babu , Sagar C. Pawar , Satyanantha R. Musunuri , Sashank Ms , Kalyan K. Kaipa
IPC: H04N13/332 , G06T11/00 , G06T15/00 , H04N13/327 , G06T1/20
Abstract: Systems, apparatuses and methods may provide for technology that includes a substrate, and a display pipeline coupled to the substrate. The display pipeline may to barrel an initial image to form a barreled image.
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