公开(公告)号：US10886209B2

公开(公告)日：2021-01-05

申请号：US16326544

申请日：2016-09-30

Applicant: Intel Corporation

Inventor： Stephen Harvey Hall ,  Bok Eng Cheah ,  Chaitanya Sreerama ,  Jackson Chung Peng Kong

IPC: H01L23/498 ,  H01L23/66 ,  H01L21/48

Abstract: A self-equalizing interconnect in a connector is installed in a microelectronic device. The self-equalizing interconnect is formed of a plurality of electrically conductive layers under conditions to offset skin-effect losses with respect to frequency change during operation. Each successive layer is configured to with the next highest electrical conductivity and subsequent electrically conductive films gradually decrease in electrical conductivity. In an embodiment, thickness of the conductive film adjacent the reference plain is configured thinnest and subsequent films are added and are seriatim gradually thicker. The highest electrically conductive film is configured closest to a reference plane in the connector, and the lowest electrically conductive film is farthest from the reference plane.

公开(公告)号：US20180350748A1

公开(公告)日：2018-12-06

申请号：US15778379

申请日：2015-11-25

Applicant: Intel Corporation

Inventor： Bok Eng Cheah ,  Jackson Chung Peng Kong ,  Stephen Harvey Hall ,  Khang Choong Yong ,  Kooi Chi Ooi ,  Eric C Gantner

IPC: H01L23/538 ,  H01L23/66 ,  H01L25/00 ,  H01L25/18 ,  H01L21/56 ,  H01L25/065

CPC classification number: H01L23/5386 ,  H01L21/561 ,  H01L21/565 ,  H01L23/5381 ,  H01L23/5383 ,  H01L23/5387 ,  H01L23/5389 ,  H01L23/66 ,  H01L25/0655 ,  H01L25/18 ,  H01L25/50 ,  H01L2223/6638 ,  H05K1/0225 ,  H05K1/0245 ,  H05K1/0253 ,  H05K1/189

Abstract: An electrical interconnect for an electronic package. The electrical interconnect includes a first dielectric layer; a second dielectric layer; a signal conductor positioned between the first dielectric layer and the second dielectric layer; and a conductive reference layer mounted on the first dielectric layer, and wherein the conductive reference layer does not cover the signal conductor. The conductive reference layer may be a first conductive reference layer and the electrical interconnect further comprises a second conductive reference layer mounted on the second dielectric layer. The second conductive reference layer does not cover the signal conductor. In addition, the signal conductor may be a first signal conductor and the electrical interconnect may further include a second signal conductor between the first dielectric layer and the second dielectric layer. The first and second signal conductors may form a differential pair of conductors.