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    Television receiver capable of enlarging and compressing image
    11.
    发明授权
    Television receiver capable of enlarging and compressing image 失效
    能够扩大和压缩图像的电视接收机

    公开(公告)号：US5534934A

    公开(公告)日：1996-07-09

    申请号：US260576

    申请日：1994-06-16

    申请人： Kenji Katsumata ,  Shigeru Hirahata ,  Toshinori Murata ,  Haruki Takata ,  Shinobu Torikoshi ,  Takanori Eda ,  Kouichi Ishibashi

    发明人： Kenji Katsumata ,  Shigeru Hirahata ,  Toshinori Murata ,  Haruki Takata ,  Shinobu Torikoshi ,  Takanori Eda ,  Kouichi Ishibashi

    IPC分类号： H04N5/262 ,  H04N3/27 ,  H04N5/46 ,  H04N7/01

    CPC分类号： H04N7/0122 ,  H04N3/27

    摘要： To provide an image which is matched with an aspect ratio of a screen of a display unit by compressing and enlarging the whole of the image to a desired size. A video signal is sequentially written into a field memory in response to a write clock from an input terminal. A clock generating circuit supplies the field memory with a read clock having a frequency which is about 4/3 times as high as that of the write clock. A vertical enlargement control circuit reads a video signal from the field memory with a line period corresponding to a magnification factor and inhibits writing to a one-line memory with the same period to provide a line delayed output for an output signal from the field memory. A vertical interpolating circuit generates a scanning line signal by an interpolation operation in accordance with a control signal from the vertical enlargement control circuit.

    摘要翻译： 通过将整个图像压缩并放大到期望的大小来提供与显示单元的屏幕的纵横比匹配的图像。 响应于来自输入端的写时钟，视频信号被顺序地写入场存储器。 时钟产生电路为场存储器提供具有与写入时钟的频率约4/3倍的频率的读时钟。 垂直放大控制电路以与放大倍率对应的行周期从场存储器读取视频信号，并禁止以相同周期对单行存储器进行写入，以提供来自场存储器的输出信号的行延迟输出。 垂直内插电路根据来自垂直放大控制电路的控制信号通过内插操作产生扫描线信号。

    Video signal processing circuit capable of enlarging and displaying a picture
    12.
    发明授权
    Video signal processing circuit capable of enlarging and displaying a picture 失效
    视频信号处理电路能够放大和显示图像

    公开(公告)号：US5029006A

    公开(公告)日：1991-07-02

    申请号：US343495

    申请日：1989-04-25

    申请人： Kenji Katsumata ,  Shigeru Hirahata ,  Masato Sugiyama ,  Takaaki Matono ,  Kazuo Ishikura ,  Sunao Suzuki ,  Kazuhiro Kaizaki

    发明人： Kenji Katsumata ,  Shigeru Hirahata ,  Masato Sugiyama ,  Takaaki Matono ,  Kazuo Ishikura ,  Sunao Suzuki ,  Kazuhiro Kaizaki

    IPC分类号： G06T3/40 ,  H04N5/262 ,  H04N9/74

    CPC分类号： G06T3/4007 ,  H04N5/262 ,  H04N5/2628 ,  H04N5/44 ,  H04N7/012

    摘要： A video signal processing circuit capable of enlarging and displaying a picture and adapted for use in an apparatus in which a desired picture is selected, and a video signal representative of the desired picture under interlaced scanning is received, stored in a memory and processed to provide an enlarged video signal, comprises includes a real signal/interpolated signal preparation circuit for preparing, from the stored video signal, new scanning lines for an image to be enlarged, and a memory processing circuit having switching control function to store an output signal of the real signal/interpolated signal preparation circuit in a memory, read the video signal out of the memory at a period different from a period at which the output signal is stored in the memory, and delay a read-out signal by one or more fields so that an enlarged signal is delivered.

    摘要翻译： 一种视频信号处理电路，其能够放大并显示图像，并且适于在其中选择期望的图像的装置中使用，并且在隔行扫描中接收表示期望图像的视频信号，存储在存储器中并进行处理以提供 扩大的视频信号包括一个实际的信号/内插信号准备电路，用于从所存储的视频信号中准备用于待放大的图像的新的扫描线，以及具有切换控制功能的存储器处理电路，用于存储 存储器中的实时信号/内插信号准备电路，以与输出信号存储在存储器中的周期不同的周期从存储器读出视频信号，并且将读出信号延迟一个或多个字段， 放大的信号被传送。

    Video signal processing circuit capable of enlarging and displaying a picture
    13.
    发明授权
    Video signal processing circuit capable of enlarging and displaying a picture 失效
    视频信号处理电路能够放大和显示图像

    公开(公告)号：US5181110A

    公开(公告)日：1993-01-19

    申请号：US634518

    申请日：1990-12-27

    申请人： Kenji Katsumata ,  Shigeru Hirahata ,  Masato Sugiyama ,  Takaaki Matono ,  Kazuo Ishikura ,  Sunao Suzuki ,  Kazuhiro Kaizaki

    发明人： Kenji Katsumata ,  Shigeru Hirahata ,  Masato Sugiyama ,  Takaaki Matono ,  Kazuo Ishikura ,  Sunao Suzuki ,  Kazuhiro Kaizaki

    IPC分类号： G06T3/40 ,  H04N5/262 ,  H04N5/44

    CPC分类号： G06T3/4007 ,  H04N5/262 ,  H04N5/2628 ,  H04N5/44 ,  H04N7/012

    摘要： A video signal processing circuit capable of enlarging and displaying a picture and adapted for use in an apparatus in which a desired picture is selected, and a video signal representative of the desired picture under interlaced scanning is received, stored in a memory and processed to provide an enlarged video signal, includes a real signal/interpolated signal preparation circuit for preparing, from the stored video signal, new scanning lines for an image to be enlarged, and a memory processing circuit having switching control function to store an output signal of the real signal/interpolated signal preparation circuit in a memory, read the video signal out of the memory at a period different from a period at which the output signal is stored in the memory, and delay a read-out signal by one or more fields so that an enlarged signal is delivered.

    摘要翻译： 一种视频信号处理电路，其能够放大并显示图像，并且适于在其中选择期望的图像的装置中使用，并且在隔行扫描中接收表示期望图像的视频信号，存储在存储器中并进行处理以提供 放大的视频信号包括一个实际信号/内插信号准备电路，用于从所存储的视频信号中准备用于要放大的图像的新扫描线，以及具有切换控制功能的存储器处理电路，以存储实际的输出信号 信号/内插信号准备电路在存储器中以与输出信号存储在存储器中的周期不同的周期从存储器读出视频信号，并且通过一个或多个字段延迟读出信号，使得 传送放大的信号。

    Compatible wide aspect ratio receiver with spatial filtering for variable zoom
    14.
    发明授权
    Compatible wide aspect ratio receiver with spatial filtering for variable zoom 失效
    兼容的宽宽比接收器，具有可变焦距的空间滤波

    公开(公告)号：US5276515A

    公开(公告)日：1994-01-04

    申请号：US942143

    申请日：1992-09-08

    申请人： Kenji Katsumata ,  Shigeru Hirahata ,  Haruki Takata ,  Mituo Konno ,  Kouichi Ishibashi ,  Kazuhiro Kaizaki ,  Takaaki Matono ,  Atushi Haratani

    发明人： Kenji Katsumata ,  Shigeru Hirahata ,  Haruki Takata ,  Mituo Konno ,  Kouichi Ishibashi ,  Kazuhiro Kaizaki ,  Takaaki Matono ,  Atushi Haratani

    IPC分类号： G06T3/40 ,  H04N5/262 ,  H04N5/44 ,  H04N7/01 ,  H04N5/46

    CPC分类号： H04N7/0122 ,  G06T3/40 ,  H04N5/2628

    摘要： A video signal processing circuit is provided to display an image of a standard television signal on a display unit with a 6:9 aspect ratio by enlarging an image of a video signal in the horizontal and vertical directions by a magnification factor which depends on the feature of the standard television signal. The processing circuit includes a first memory circuit which reads out the stored video signal in response to a read clock different from the write clock and generated by a stable frequency source so that the image of the video signal is expanded in the vertical direction, a second memory circuit which implements time-base compression for the output of the first memory circuit and thereafter expands the signal, a spatial filter which implements filtering for the output of the second memory circuit, an enlargement control circuit which control the above-mentioned circuits, and a synchronizing processing circuit. The circuit arrangement enables video signals of various image sizes, such as for movie pictures, to be displayed by signal conversion on a display unit with a 16:9 aspect ratio, and is capable of suppressing jitters of video signals.

    摘要翻译： 提供一种视频信号处理电路，通过在水平和垂直方向上放大视频信号的图像，依赖于特征的放大系数，以6:9的宽高比在显示单元上显示标准电视信号的图像 的标准电视信号。 处理电路包括：第一存储器电路，其响应于与写入时钟不同的读取时钟读出存储的视频信号，并由稳定的频率源产生，使得视频信号的图像在垂直方向上扩展，第二存储器电路 对第一存储器电路的输出进行时基压缩，然后扩展信号的存储电路，对第二存储电路的输出实现滤波的空间滤波器，控制上述电路的放大控制电路，以及 一个同步处理电路。 该电路装置能够通过在具有16:9宽高比的显示单元上进行信号转换来显示诸如电影图像的各种图像尺寸的视频信号，并且能够抑制视频信号的抖动。

    Wide-screen television receiver with aspect ratio conversion function and method of displaying a range to be magnified and displayed
    15.
    发明授权
    Wide-screen television receiver with aspect ratio conversion function and method of displaying a range to be magnified and displayed 失效
    具有宽高比转换功能的宽屏电视接收机和显示要放大和显示的范围的方法

    公开(公告)号：US5343238A

    公开(公告)日：1994-08-30

    申请号：US886856

    申请日：1992-05-22

    申请人： Haruki Takata ,  Kenji Katsumata ,  Shigeru Hirahata ,  Mituo Konno ,  Kouichi Ishibashi ,  Sunao Suzuki

    发明人： Haruki Takata ,  Kenji Katsumata ,  Shigeru Hirahata ,  Mituo Konno ,  Kouichi Ishibashi ,  Sunao Suzuki

    IPC分类号： G06T3/40 ,  H04N5/44 ,  H04N5/46

    CPC分类号： G06T3/4007 ,  H04N7/0122

    摘要： A wide-screen television receiver capable of converting a TV signal of a non-aspect ratio into a signal of a wide aspect ratio which can be displayed on a wide screen of the wide aspect ratio and previously visually informing the user of what part of the image of the non-aspect ratio TV signal is converted in its aspect ratio and displayed on the wide screen. The receiver includes the interpolation scan speed conversion circuit, the mode setting circuit, the aspect ratio converting circuit, the wide cursor adding circuit and the wide display. The interpolation scan speed conversion circuit makes a series of processes such as Y/C separation and scan line interpolation for the input video signal supplied via the input terminal. The aspect ratio converting circuit compresses the video signal from the interpolation scan speed conversion circuit in the horizontal direction by use of a memory. The magnification processing circuit is provided after the aspect ratio converting circuit. This magnification processing circuit magnifies the horizontally compressed video signal so that an arbitrary part of image specified by the mode setting circuit can be magnified at given magnification powers in the horizontal and vertical direction. The wide screen display displays the magnified image of the video signal without horizontal and vertical distortions on the wide screen.

    摘要翻译： 一种能够将非高宽比的TV信号转换为宽宽比的信号的宽屏幕电视接收机，其可以在宽宽比的宽屏幕上显示，并且以前可视地通知用户哪些部分 非纵横比TV信号的图像以其纵横比转换并显示在宽屏幕上。 接收机包括内插扫描速度转换电路，模式设置电路，宽高比转换电路，宽光标添加电路和宽显示。 内插扫描速度转换电路对通过输入端子提供的输入视频信号进行一系列处理，例如Y / C分离和扫描线内插。 宽高比转换电路通过使用存储器在水平方向上压缩来自内插扫描速度转换电路的视频信号。 放大处理电路在宽高比转换电路之后提供。 该放大处理电路放大水平压缩的视频信号，使得由模式设置电路指定的图像的任意部分可以在水平和垂直方向上以给定的放大倍数来放大。 宽屏幕显示屏在宽屏幕上显示视频信号的放大图像，无水平和垂直失真。

    Video decoder/converter with a programmable logic device which is programmed based on the encoding format
    17.
    发明授权
    Video decoder/converter with a programmable logic device which is programmed based on the encoding format 失效
    具有基于编码格式编程的可编程逻辑器件的视频解码器/转换器

    公开(公告)号：US5703658A

    公开(公告)日：1997-12-30

    申请号：US661990

    申请日：1996-06-12

    申请人： Yasutaka Tsuru ,  Takumi Okamura ,  Shoji Kimura ,  Yuji Yamamoto ,  Toshinori Murata ,  Kenji Katsumata ,  Moriyoshi Akiyama ,  Takanori Eda

    发明人： Yasutaka Tsuru ,  Takumi Okamura ,  Shoji Kimura ,  Yuji Yamamoto ,  Toshinori Murata ,  Kenji Katsumata ,  Moriyoshi Akiyama ,  Takanori Eda

    IPC分类号： H04N5/46 ,  H04N71/01

    CPC分类号： H04N5/46 ,  H04N21/435 ,  H04N21/4435 ,  H04N21/4586 ,  H04N21/4622 ,  H04N21/8193 ,  H04N5/4401

    摘要： An apparatus and a method for receiving television signals can display a television signal of a novel signal format, even at a low cost, without addition of any hardware. The apparatus and a method for receiving a television signal employs a data input unit for receiving video data encoded by any one format among multiple kinds of encoding formats, a video data memory for storing the video data from the data input unit, a decoding process program memory for storing multiple kinds of decoding process programs for decoding processes corresponding to received video data having multiple kinds of encoding formats, a programmable logic device which can vary the hardware constitution for the decoding process, a logic device varying unit for varying the hardware constitution for the decoding process, a decoding control unit for varying the circuit constitution of the programmable logic device via the logic device varying unit depending on the encoding format of the input video data and decoding the video data stored in the video data memory into a video signal which may be displayed depending on the decoding process program, and a display for displaying the decoded video signal.

    摘要翻译： 用于接收电视信号的装置和方法即使以低成本也可以显示新颖信号格式的电视信号，而不增加任何硬件。 用于接收电视信号的装置和方法采用数据输入单元，用于接收由多种编码格式中的任何格式编码的视频数据，用于存储来自数据输入单元的视频数据的视频数据存储器，解码处理程序 存储器，用于存储用于解码与具有多种编码格式的接收视频数据相对应的处理的多种解码处理程序;可编程逻辑装置，其可改变用于解码处理的硬件构成;逻辑装置改变单元，用于改变硬件构成， 解码处理，解码控制单元，用于根据输入视频数据的编码格式经由逻辑设备改变单元改变可编程逻辑器件的电路结构，并将存储在视频数据存储器中的视频数据解码为视频信号， 可以根据解码处理程序和用于显示dec的显示来显示 有视频信号。

    Digital broadcast transmitting and receiving system and transmitting and receiving apparatus thereof
    18.
    发明授权
    Digital broadcast transmitting and receiving system and transmitting and receiving apparatus thereof 失效
    数字广播发射和接收系统及其发射和接收装置

    公开(公告)号：US5774548A

    公开(公告)日：1998-06-30

    申请号：US707530

    申请日：1996-09-04

    申请人： Yumi Bando ,  Toshinori Murata ,  Takumi Okamura ,  Kenji Katsumata ,  Masaru Nanki ,  Takanori Eda ,  Satoshi Imuro ,  Satoru Takashimizu

    发明人： Yumi Bando ,  Toshinori Murata ,  Takumi Okamura ,  Kenji Katsumata ,  Masaru Nanki ,  Takanori Eda ,  Satoshi Imuro ,  Satoru Takashimizu

    IPC分类号： H04N7/167 ,  H04K1/02

    CPC分类号： H04N7/1675 ,  H04N21/2347 ,  H04N21/2541 ,  H04N21/26606 ,  H04N21/4405 ,  H04N5/913 ,  H04N2005/91328 ,  H04N2005/91364

    摘要： An arrangement to automatically change between a scrambled digital data output and descrambled digital data output of a receiver by inserting a control signal conforming to a program provider's policy into a transmission signal. In a receiving side, a descrambler descrambles a channel-decoded signal, a demultiplexer demultiplexes the multiplexed signal from the descrambler into encoded video and audio data for output to a source decoder, and extracts the control information inserted in the transmitting side for output to a switch or CPU. The CPU decrypts a control signal from the control information extracted by the demultiplexer to determine whether the scrambled digital signal or descrambled digital signal is appropriate for output, and outputs a changeover control signal depending on the result of decryption. A switch selects the output of a scrambled digital signal from a stage prior to the descrambler, or a descrambled digital signal from a stage subsequent to the descrambler, depending on the changeover control signal from the CPU. Thereby, a scrambled digital signal output or descrambled digital signal output can automatically be changed over depending on a program provider's policy.

    摘要翻译： 一种通过将符合节目提供者策略的控制信号插入到传输信号中，在加扰数字数据输出和接收机的解扰数字数据输出之间自动改变的装置。 在接收侧，解扰器解扰通道解码信号，解复用器将来自解扰器的复用信号解复用为编码视频和音频数据，以输出到源解码器，并提取插入发送侧的控制信息，以输出到 开关或CPU。 CPU从由解复用器提取的控制信息中解密控制信号，以确定加密数字信号或解扰数字信号是否适于输出，并根据解密结果输出切换控制信号。 开关根据来自CPU的切换控制信号，从解扰器之前的一级选择加扰数字信号的输出，或从解扰器之后的级中选择解扰数字信号。 因此，根据程序提供者的策略，可以自动地改变加扰数字信号输出或解扰数字信号输出。