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15 条记录 (耗时 0.011 秒)

    Digital blanking reproducing circuit
    1.
    发明授权
    Digital blanking reproducing circuit 失效
    数字消隐再现电路

    公开(公告)号：US4769706A

    公开(公告)日：1988-09-06

    申请号：US84130

    申请日：1987-08-12

    申请人： Kazuhiro Kaizaki

    发明人： Kazuhiro Kaizaki

    IPC分类号： H04N5/16 ,  H03M1/20 ,  H04N5/14

    CPC分类号： H04N5/14

    摘要： A digital blanking reproducing circuit wherein video signals are converted into N (N: positive integer) bit digital signals and then signal-processed. On the basis of plural N bit signals during the blanking interval of the video signal, an M (M: positive integer, M>N) bit average signal and a plurality of N bit approximation data in the neighborhood of the average value signal are produced. The plurality of N bit approximation data are time-divisionally output in a time-division ratio decided in accordance with the lower order (M - N) bit data of the average signal. Thus, the signal processing of the N bit signals provides the accuracy equivalent to that of M (M>N) bit signals.

    摘要翻译： 数字消隐再现电路，其中视频信号被转换为N（N：正整数）位数字信号，然后进行信号处理。 基于视频信号的消​​隐间隔期间的多个N位信号，产生平均值信号附近的M（M：正整数，M> N）位平均信号和多个N位近似数据 。 多个N位近似数据按照根据平均信号的低阶（M-N）比特数据确定的时分比时分地输出。 因此，N位信号的信号处理提供与M（M> N）位信号相当的精度。

    System and method for converting video signals for display on television receiver screens of differing aspect ratios
    3.
    发明授权
    System and method for converting video signals for display on television receiver screens of differing aspect ratios 失效
    用于转换视频信号以在不同宽高比的电视接收机屏幕上显示的系统和方法

    公开(公告)号：US5384600A

    公开(公告)日：1995-01-24

    申请号：US179036

    申请日：1994-01-06

    申请人： Kazuhiro Kaizaki ,  Masako Kamimura ,  Takaaki Matono ,  Sadao Kubota

    发明人： Kazuhiro Kaizaki ,  Masako Kamimura ,  Takaaki Matono ,  Sadao Kubota

    IPC分类号： H04N5/46 ,  H04N5/262

    CPC分类号： H04N7/0122

    摘要： A television receiver which can display images in different displaying forms on a display screen with an aspect ratio of 16:9 by controlling the video chroma processing circuit by the micro computer by operating the remote controlled signal acceptor or the key switch has memories. The first memory stores video control data for each displaying form and the second memory stores appointed data for designating predetermined video control data. When the displaying form is changed by operating the remote controlled signal acceptor or the key switch, the micro computer reads the video control data corresponding to the displaying form which is newly set from the first memory according to the appointed data of the second memory and changes, for example, the contrast characteristic in the signal processing circuit according to the read data. By doing this, in the television receiver which is applicable to both a high quality television system and the conventional television system, when displaying images of conventional television signals in different displaying forms on a display screen with an aspect ratio of 16:9, the most suitable image quality can be obtained for each displaying form.

    摘要翻译： 可以通过操作遥控信号接收器或按键开关通过微型计算机控制视频色度处理电路，以显示屏幕以16：9的显示屏显示图像的电视接收机具有存储器。 第一存储器存储每个显示形式的视频控制数据，第二存储器存储用于指定预定视频控制数据的指定数据。 当通过操作遥控信号接收器或按键开关改变显示形式时，微型计算机根据第二存储器的指定数据从第一存储器读取对应于新设置的显示形式的视频控制数据，并改变 ，例如，根据读取的数据的信号处理电路中的对比度特性。 通过这样做，在适用于高质量电视系统和传统电视系统的电视接收机中，当以16:9的宽高比在不同显示形式的显示屏幕上显示常规电视信号的图像时，最多 可以为每种显示形式获得合适的图像质量。

    Compatible wide aspect ratio receiver with spatial filtering for variable zoom
    6.
    发明授权
    Compatible wide aspect ratio receiver with spatial filtering for variable zoom 失效
    兼容的宽宽比接收器，具有可变焦距的空间滤波

    公开(公告)号：US5276515A

    公开(公告)日：1994-01-04

    申请号：US942143

    申请日：1992-09-08

    申请人： Kenji Katsumata ,  Shigeru Hirahata ,  Haruki Takata ,  Mituo Konno ,  Kouichi Ishibashi ,  Kazuhiro Kaizaki ,  Takaaki Matono ,  Atushi Haratani

    发明人： Kenji Katsumata ,  Shigeru Hirahata ,  Haruki Takata ,  Mituo Konno ,  Kouichi Ishibashi ,  Kazuhiro Kaizaki ,  Takaaki Matono ,  Atushi Haratani

    IPC分类号： G06T3/40 ,  H04N5/262 ,  H04N5/44 ,  H04N7/01 ,  H04N5/46

    CPC分类号： H04N7/0122 ,  G06T3/40 ,  H04N5/2628

    摘要： A video signal processing circuit is provided to display an image of a standard television signal on a display unit with a 6:9 aspect ratio by enlarging an image of a video signal in the horizontal and vertical directions by a magnification factor which depends on the feature of the standard television signal. The processing circuit includes a first memory circuit which reads out the stored video signal in response to a read clock different from the write clock and generated by a stable frequency source so that the image of the video signal is expanded in the vertical direction, a second memory circuit which implements time-base compression for the output of the first memory circuit and thereafter expands the signal, a spatial filter which implements filtering for the output of the second memory circuit, an enlargement control circuit which control the above-mentioned circuits, and a synchronizing processing circuit. The circuit arrangement enables video signals of various image sizes, such as for movie pictures, to be displayed by signal conversion on a display unit with a 16:9 aspect ratio, and is capable of suppressing jitters of video signals.

    摘要翻译： 提供一种视频信号处理电路，通过在水平和垂直方向上放大视频信号的图像，依赖于特征的放大系数，以6:9的宽高比在显示单元上显示标准电视信号的图像 的标准电视信号。 处理电路包括：第一存储器电路，其响应于与写入时钟不同的读取时钟读出存储的视频信号，并由稳定的频率源产生，使得视频信号的图像在垂直方向上扩展，第二存储器电路 对第一存储器电路的输出进行时基压缩，然后扩展信号的存储电路，对第二存储电路的输出实现滤波的空间滤波器，控制上述电路的放大控制电路，以及 一个同步处理电路。 该电路装置能够通过在具有16:9宽高比的显示单元上进行信号转换来显示诸如电影图像的各种图像尺寸的视频信号，并且能够抑制视频信号的抖动。

    Video signal processing circuit capable of enlarging and displaying a picture
    7.
    发明授权
    Video signal processing circuit capable of enlarging and displaying a picture 失效
    视频信号处理电路能够放大和显示图像

    公开(公告)号：US5029006A

    公开(公告)日：1991-07-02

    申请号：US343495

    申请日：1989-04-25

    申请人： Kenji Katsumata ,  Shigeru Hirahata ,  Masato Sugiyama ,  Takaaki Matono ,  Kazuo Ishikura ,  Sunao Suzuki ,  Kazuhiro Kaizaki

    发明人： Kenji Katsumata ,  Shigeru Hirahata ,  Masato Sugiyama ,  Takaaki Matono ,  Kazuo Ishikura ,  Sunao Suzuki ,  Kazuhiro Kaizaki

    IPC分类号： G06T3/40 ,  H04N5/262 ,  H04N9/74

    CPC分类号： G06T3/4007 ,  H04N5/262 ,  H04N5/2628 ,  H04N5/44 ,  H04N7/012

    摘要： A video signal processing circuit capable of enlarging and displaying a picture and adapted for use in an apparatus in which a desired picture is selected, and a video signal representative of the desired picture under interlaced scanning is received, stored in a memory and processed to provide an enlarged video signal, comprises includes a real signal/interpolated signal preparation circuit for preparing, from the stored video signal, new scanning lines for an image to be enlarged, and a memory processing circuit having switching control function to store an output signal of the real signal/interpolated signal preparation circuit in a memory, read the video signal out of the memory at a period different from a period at which the output signal is stored in the memory, and delay a read-out signal by one or more fields so that an enlarged signal is delivered.

    摘要翻译： 一种视频信号处理电路，其能够放大并显示图像，并且适于在其中选择期望的图像的装置中使用，并且在隔行扫描中接收表示期望图像的视频信号，存储在存储器中并进行处理以提供 扩大的视频信号包括一个实际的信号/内插信号准备电路，用于从所存储的视频信号中准备用于待放大的图像的新的扫描线，以及具有切换控制功能的存储器处理电路，用于存储 存储器中的实时信号/内插信号准备电路，以与输出信号存储在存储器中的周期不同的周期从存储器读出视频信号，并且将读出信号延迟一个或多个字段， 放大的信号被传送。

    Noise reduction circuit
    8.
    发明授权
    Noise reduction circuit 失效
    降噪电路

    公开(公告)号：US4636863A

    公开(公告)日：1987-01-13

    申请号：US776876

    申请日：1985-09-17

    申请人： Kazuhiro Kaizaki ,  Sadao Kubota ,  Hiroshi Harada ,  Shigeo Matsuura

    发明人： Kazuhiro Kaizaki ,  Sadao Kubota ,  Hiroshi Harada ,  Shigeo Matsuura

    IPC分类号： H04N5/21 ,  H04N9/64

    CPC分类号： H04N5/21

    摘要： A noise reduction circuit for reducing noise in video signal comprises delay circuits for delaying an output video signal for delay time 2S and H-S (H denotes one horizontal scanning period and S denotes a half of one period of the color subcarrier), an average circuit for averaging the outputs of the delay circuits, a subtraction circuit for subtracting the output of the average circuit from an input video signal, an attenuation circuit for attenuating the output of the subtraction circuit, an addition circuit for adding the output of the attenuation circuit to the input video signal, and an edge detection circuit for detecting the edge of pattern in the input video signal. The attenuation factor of the attenuation circuit is set into zero when the edge of pattern is detected.

    摘要翻译： 用于降低视频信号噪声的降噪电路包括用于延迟延迟时间2S和HS的输出视频信号的延迟电路（H表示一个水平扫描周期，S表示彩色副载波的一个周期的一半），平均电路 平均延迟电路的输出，减法电路，用于从输入视频信号中减去平均电路的输出;衰减电路，用于衰减减法电路的输出;加法电路，用于将衰减电路的输出与 输入视频信号，以及用于检测输入视频信号中图案边缘的边缘检测电路。 当检测到图案的边缘时，衰减电路的衰减因子被设置为零。

    Liquid crystal display device
    9.
    发明授权
    Liquid crystal display device 有权
    液晶显示装置

    公开(公告)号：US08363179B2

    公开(公告)日：2013-01-29

    申请号：US12912866

    申请日：2010-10-27

    申请人： Hidenao Kubota ,  Kazuhiro Kaizaki ,  Shigeyuki Sasaki ,  Takeshi Mochizuki ,  Toshihiro Tsutsui

    发明人： Hidenao Kubota ,  Kazuhiro Kaizaki ,  Shigeyuki Sasaki ,  Takeshi Mochizuki ,  Toshihiro Tsutsui

    IPC分类号： G02F1/1333

    CPC分类号： G02B6/008 ,  G02B6/0083 ,  G02B6/0085 ,  G02B6/009 ,  G02F1/133603 ,  G02F2001/133613

    摘要： A liquid crystal display device with improved thermal exhaustion property, enabling a thickness reduction, includes a backlight including light sources illuminating a liquid crystal panel from a back face, and a chassis holding the backlight. The backlight includes: plural light-source units each including a combination of a LED emitting light in a direction parallel to a display surface of the panel, a wiring board mounted with the LED, and a light-guide plate having translucency for guiding the LED light toward the panel; a metal chassis supporting the light-source units; and a thermally conductive sheet tightly inserted between the metal chassis and a reverse side of the wiring board opposite to the LED-mounted face. A wiring pattern is formed on the reverse side. The metal chassis and the wiring pattern located within a predetermined distance of the LED outer periphery are connected through the thermally conductive sheet.

    摘要翻译： 具有改善的热耗尽特性的能够实现厚度减小的液晶显示装置包括背光，其包括从背面照射液晶面板的光源和保持背光的底座。 背光源包括：多个光源单元，每个光源单元包括在平行于面板的显示表面的方向上发光的LED的组合;安装有LED的布线板;以及具有用于引导LED的透光性的导光板 光朝面板; 支撑光源单元的金属底盘; 以及导热片，其紧密地插入在金属底座和与LED安装面相对的布线板的相反侧。 在相反侧形成布线图案。 位于LED外周的预定距离内的金属底盘和布线图案通过导热片连接。

    LIQUID CRYSTAL DISPLAY DEVICE
    10.
    发明申请
    LIQUID CRYSTAL DISPLAY DEVICE 有权
    液晶显示装置

    公开(公告)号：US20110234939A1

    公开(公告)日：2011-09-29

    申请号：US12912866

    申请日：2010-10-27

    申请人： Hidenao Kubota ,  Kazuhiro Kaizaki ,  Shigeyuki Sasaki ,  Takeshi Mochizuki ,  Toshihiro Tsutsui

    发明人： Hidenao Kubota ,  Kazuhiro Kaizaki ,  Shigeyuki Sasaki ,  Takeshi Mochizuki ,  Toshihiro Tsutsui

    IPC分类号： G02F1/13357

    CPC分类号： G02B6/008 ,  G02B6/0083 ,  G02B6/0085 ,  G02B6/009 ,  G02F1/133603 ,  G02F2001/133613

    摘要： A liquid crystal display device with improved thermal exhaustion property, enabling a thickness reduction, includes a backlight including light sources illuminating a liquid crystal panel from a back face, and a chassis holding the backlight. The backlight includes: plural light-source units each including a combination of a LED emitting light in a direction parallel to a display surface of the panel, a wiring board mounted with the LED, and a light-guide plate having translucency for guiding the LED light toward the panel; a metal chassis supporting the light-source units; and a thermally conductive sheet tightly inserted between the metal chassis and a reverse side of the wiring board opposite to the LED-mounted face. A wiring pattern is formed on the reverse side. The metal chassis and the wiring pattern located within a predetermined distance of the LED outer periphery are connected through the thermally conductive sheet.

    摘要翻译： 具有改善的热耗尽特性的能够实现厚度减小的液晶显示装置包括背光，其包括从背面照射液晶面板的光源和保持背光的底座。 背光源包括：多个光源单元，每个光源单元包括在平行于面板的显示表面的方向上发光的LED的组合;安装有LED的布线板;以及具有用于引导LED的透光性的导光板 光朝面板; 支撑光源单元的金属底盘; 以及导热片，其紧密地插入在金属底座和与LED安装面相对的布线板的相反侧。 在相反侧形成布线图案。 位于LED外周的预定距离内的金属底座和布线图案通过导热片连接。