公开(公告)号：US08067260B1

公开(公告)日：2011-11-29

申请号：US12792992

申请日：2010-06-03

Applicant: Ming Jin ,  Ilya V. Karpov ,  Jinwook Lee ,  Narahari Ramanuja

Inventor： Ming Jin ,  Ilya V. Karpov ,  Jinwook Lee ,  Narahari Ramanuja

IPC: H01L45/00

CPC classification number: H01L45/16 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144

Abstract: A small critical dimension element, such as a heater for an ovonic unified memory, may be formed within a pore by using successive sidewall spacers. The use of at least two successive spacers enables the limitations imposed by lithography and the limitations imposed by bread loafing be overcome to provide reduced critical dimension elements.

Abstract translation: 可以通过使用连续的侧壁间隔物在孔内形成小的关键尺寸元件，例如用于二次统一存储器的加热器。 使用至少两个连续的间隔物可以克服光刻造成的局限性，并克服面包铺面施加的限制，以提供减少的临界尺寸元件。

公开(公告)号：US08026173B2

公开(公告)日：2011-09-27

申请号：US12048121

申请日：2008-03-13

Applicant: Ilya Karpov ,  Yudong Kim ,  Ming Jin ,  Shyam Prasad Teegapuram ,  Jinwook Lee

Inventor： Ilya Karpov ,  Yudong Kim ,  Ming Jin ,  Shyam Prasad Teegapuram ,  Jinwook Lee

IPC: H01L21/8239

CPC classification number: H01L45/16 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126

Abstract: A phase change memory formed by a plurality of phase change memory devices having a chalcogenide memory region extending over an own heater. The heaters have all a relatively uniform height. The height uniformity is achieved by forming the heaters within pores in an insulator that includes an etch stop layer and a sacrificial layer. The sacrificial layer is removed through an etching process such as chemical mechanical planarization. Since the etch stop layer may be formed in a repeatable way and is common across all the devices on a wafer, considerable uniformity is achieved in heater height. Heater height uniformity results in more uniformity in programmed memory characteristics.

Abstract translation: 一种由具有在自身加热器上延伸的硫族化物存储区的多个相变存储器件形成的相变存储器。 加热器具有相对均匀的高度。 通过在包括蚀刻停止层和牺牲层的绝缘体的孔内形成加热器来实现高度均匀性。 通过诸如化学机械平面化的蚀刻工艺去除牺牲层。 由于蚀刻停止层可以以可重复的方式形成，并且在晶片上的所有器件上是共同的，所以在加热器高度方面实现了相当大的均匀性。 加热器高度均匀性导致编程存储器特性更均匀。

公开(公告)号：US20090020743A1

公开(公告)日：2009-01-22

申请号：US12048121

申请日：2008-03-13

Applicant: Ilya Karpov ,  Yudong Kim ,  Ming Jin ,  Shyam Prasad Teegapuram ,  Jinwook Lee

Inventor： Ilya Karpov ,  Yudong Kim ,  Ming Jin ,  Shyam Prasad Teegapuram ,  Jinwook Lee

IPC: H01L45/00

CPC classification number: H01L45/16 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126

Abstract: A phase change memory formed by a plurality of phase change memory devices having a chalcogenide memory region extending over an own heater. The heaters have all a relatively uniform height. The height uniformity is achieved by forming the heaters within pores in an insulator that includes an etch stop layer and a sacrificial layer. The sacrificial layer is removed through an etching process such as chemical mechanical planarization. Since the etch stop layer may be formed in a repeatable way and is common across all the devices on a wafer, considerable uniformity is achieved in heater height. Heater height uniformity results in more uniformity in programmed memory characteristics.

Abstract translation: 一种由具有在自身加热器上延伸的硫族化物存储区的多个相变存储器件形成的相变存储器。 加热器具有相对均匀的高度。 通过在包括蚀刻停止层和牺牲层的绝缘体的孔内形成加热器来实现高度均匀性。 通过诸如化学机械平面化的蚀刻工艺去除牺牲层。 由于蚀刻停止层可以以可重复的方式形成，并且在晶片上的所有器件上是共同的，所以在加热器高度方面实现了相当大的均匀性。 加热器高度均匀性导致编程存储器特性更均匀。

公开(公告)号：US20070023857A1

公开(公告)日：2007-02-01

申请号：US11193952

申请日：2005-07-29

Applicant: Ming Jin ,  Ilya Karpov ,  Jinwook Lee ,  Narahari Ramanuja

Inventor： Ming Jin ,  Ilya Karpov ,  Jinwook Lee ,  Narahari Ramanuja

IPC: H01L29/00

CPC classification number: H01L45/16 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144

Abstract: A small critical dimension element, such as a heater for an ovonic unified memory, may be formed within a pore by using successive sidewall spacers. The use of at least two successive spacers enables the limitations imposed by lithography and the limitations imposed by bread loafing to be overcome to provide reduced critical dimension elements.

Abstract translation: 可以通过使用连续的侧壁间隔物在孔内形成小的关键尺寸元件，例如用于二次统一存储器的加热器。 使用至少两个连续的间隔物使得能够克服通过光刻所施加的限制，并且克服由面包变形所施加的限制以提供减小的临界尺寸元件。

公开(公告)号：US08530875B1

公开(公告)日：2013-09-10

申请号：US12774772

申请日：2010-05-06

Applicant: Kuo-Wei Chang ,  Jinwook Lee ,  Jong-Won Lee ,  Elijah V. Karpov

Inventor： Kuo-Wei Chang ,  Jinwook Lee ,  Jong-Won Lee ,  Elijah V. Karpov

IPC: H01L29/43

CPC classification number: H01L45/16 ,  H01L45/06 ,  H01L45/1253 ,  H01L45/126 ,  H01L45/141 ,  H01L45/1675

Abstract: Erosion of chalcogenides in phase change memories using ovonic threshold switch selectors can be reduced by controlling columnar morphology in electrodes used in the ovonic threshold switch. The columnar morphology may cause cracks to occur which allow etchants used to etch the ovonic threshold switch to sneak through the ovonic threshold switch and to attack chalcogenides, either in the switch or in the memory element. In one embodiment, the electrode may be split into two metal nitride layers separated by an intervening metal layer.

Abstract translation: 通过控制在椭圆形阈值开关中使用的电极中的柱状形态，可以减少硫化物在相变存储器中的侵蚀。 柱状形态可能导致裂纹发生，这允许蚀刻剂用于蚀刻超声波阈值开关以潜入超声波阈值开关，并在开关或存储元件中攻击硫族化物。 在一个实施例中，电极可以被分成由中间金属层隔开的两个金属氮化物层。

公开(公告)号：US08174902B2

公开(公告)日：2012-05-08

申请号：US12500867

申请日：2009-07-10

Applicant: Jinwook Lee ,  Jinyub Lee ,  Sangwon Hwang

Inventor： Jinwook Lee ,  Jinyub Lee ,  Sangwon Hwang

IPC: G11C16/06

CPC classification number: G11C16/0483 ,  G11C16/10 ,  G11C16/3454

Abstract: A method, device and system are provided for programming a flash memory device, the method including executing a bit line setup operation, and executing a channel pre-charge operation simultaneously with the bit line setup operation, the channel pre-charge operation including applying a channel pre-charge voltage to all word lines; and the device including a voltage generator disposed for providing each of a program voltage, a read voltage, a pass voltage, and a channel pre-charge voltage, a high-voltage switch connected to the voltage generator and disposed for switchably providing one of the program voltage, read voltage, pass voltage, or channel pre-charge voltage, and control logic connected to the high-voltage switch and disposed for simultaneously executing a bit line setup operation and a channel pre-charge operation, the channel pre-charge operation comprising controlling the high-voltage switch to apply the channel pre-charge voltage to both selected and unselected word lines of the device.

Abstract translation: 提供了一种用于对闪速存储器件进行编程的方法，装置和系统，所述方法包括执行位线设置操作，以及与位线设置操作同时执行通道预充电操作，所述通道预充电操作包括应用 通道预充电电压到所有字线; 并且所述装置包括被设置用于提供编程电压，读取电压，通过电压和通道预充电电压中的每一个的电压发生器，连接到电压发生器的高压开关，并且被设置用于可切换地提供 编程电压，读取电压，通过电压或通道预充电电压，以及连接到高压开关的控制逻辑，并被设置用于同时执行位线设置操作和通道预充电操作，通道预充电操作 包括控制所述高压开关以将所述通道预充电电压施加到所述器件的所选择的和未选择的字线。

公开(公告)号：US20110127485A1

公开(公告)日：2011-06-02

申请号：US12627443

申请日：2009-11-30

Applicant: Soonwoo Cha ,  Tim Minvielle ,  Jong-Won Lee ,  Jinwook Lee

Inventor： Soonwoo Cha ,  Tim Minvielle ,  Jong-Won Lee ,  Jinwook Lee

IPC: H01L45/00 ,  H01L21/06 ,  G06F12/00

CPC classification number: H01L45/128 ,  G11C13/0004 ,  H01L27/2436 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/141 ,  H01L45/144 ,  H01L45/16

Abstract: Subject matter disclosed herein relates to a method of manufacturing a semiconductor integrated circuit device, and more particularly to a method of fabricating a phase change memory device.

Abstract translation: 本文公开的主题涉及制造半导体集成电路器件的方法，更具体地说涉及制造相变存储器件的方法。