公开(公告)号：US20210343848A1

公开(公告)日：2021-11-04

申请号：US17374475

申请日：2021-07-13

Applicant: Kioxia Corporation

Inventor： Tetsuaki UTSUMI

IPC: H01L29/423

Abstract: A semiconductor memory device includes: a semiconductor substrate; a memory cell array disposed separately from the semiconductor substrate in a first direction; and first and second transistor arrays disposed on the semiconductor substrate. The semiconductor substrate includes a first region to a fourth region arranged in a second direction and a fifth region to an eighth region arranged in the second direction. These regions are each adjacent in a third direction. The memory cell array includes first conducting layers disposed in the first to fourth regions and second conducting layers disposed in the fifth to eighth regions. The first transistor array includes transistors connected to the plurality of first conducting layers via contacts disposed in the second region. The second transistor array includes transistors connected to the plurality of second conducting layers via contacts disposed in the seventh region.

公开(公告)号：US20210295886A1

公开(公告)日：2021-09-23

申请号：US17010569

申请日：2020-09-02

Applicant: KIOXIA CORPORATION

Inventor： Tetsuaki UTSUMI

IPC: G11C7/10 ,  G11C11/4074 ,  G11C11/408 ,  G11C5/06

Abstract: A semiconductor storage device includes a first input driver configured to receive a first signal from a memory controller, a second input driver configured to receive a chip enable signal from the memory controller, and a first control circuit. The first control circuit is configured to set the semiconductor storage device in an enabled state or a disabled state depending on whether or not the first signal which is received during a time period that starts with assertion of the chip enable signal and is prior to receipt of a command sequence, corresponds to a first chip address.

公开(公告)号：US20210233846A1

公开(公告)日：2021-07-29

申请号：US17004234

申请日：2020-08-27

Applicant: Kioxia Corporation

Inventor： Tetsuaki UTSUMI

IPC: H01L23/535 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11582 ,  H01L23/522 ,  H01L21/768

Abstract: A semiconductor device includes a substrate and a first semiconductor layer and a second semiconductor layer each extending in a first direction perpendicular to a surface of the substrate. Furthermore, the semiconductor device includes a first plug provided on the first semiconductor layer and a second plug provided on the second semiconductor layers, and a connection wiring having an upper surface that is at a same height along the first direction as upper surfaces of the first and second plugs, and having a lower surface that is at a same height along the first direction as lower surfaces of the first and second plugs. Furthermore, the semiconductor device includes a first wiring provided on the first plug and the connection wiring and a second wiring provided on the second plug and the connection wiring.

公开(公告)号：US20210082897A1

公开(公告)日：2021-03-18

申请号：US17003694

申请日：2020-08-26

Applicant: KIOXIA CORPORATION

Inventor： Nobuaki OKADA ,  Tetsuaki UTSUMI

IPC: H01L25/18 ,  H01L23/00 ,  G11C16/30

Abstract: A semiconductor storage device includes first and second chips and first and second power supply electrodes. The first chip includes conductive layers arranged in a first direction, a semiconductor pillar extending in the first direction and facing the conductive layers, first contacts extending in the first direction and connected to the conductive layers, second contacts extending in the first direction and connected to a first power supply electrode, third contacts extending in the first direction, facing the second contacts in a direction crossing the first direction, and connected to the second power supply electrode, and first bonding electrodes connected to the first contacts. The second chip includes a semiconductor substrate, transistors provided on the semiconductor substrate, fourth contacts connected to the transistors, and second bonding electrodes connected to the fourth contacts. The first and second chips are bonded together so that respective first and second bonding electrodes are connected together.

公开(公告)号：US20210082879A1

公开(公告)日：2021-03-18

申请号：US16806079

申请日：2020-03-02

Applicant: Kioxia Corporation

Inventor： Tomoya SANUKI ,  Hiroshi MAEJIMA ,  Tetsuaki UTSUMI

IPC: H01L25/065 ,  H01L25/18 ,  H01L23/00

Abstract: According to one embodiment, a semiconductor memory device includes a memory cell, a first voltage generator and a second voltage generator. The memory cell is provided above a substrate. The first voltage generator is provided between the substrate and the memory cell. The first voltage generator is configured to generate a first voltage to be supplied to the memory cell. The second voltage generator is provided between the substrate and the memory cell. The second voltage generator is configured to generate the first voltage and have a circuit configuration equivalent to the first voltage generator.