公开(公告)号：US20240028529A1

公开(公告)日：2024-01-25

申请号：US18477709

申请日：2023-09-29

Applicant: KIOXIA CORPORATION

Inventor： Kenji SAKAUE ,  Toshiyuki FURUSAWA ,  Shinya TAKEDA

IPC: G06F13/16 ,  G06F13/40 ,  G06F13/42 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00

CPC classification number: G06F13/1668 ,  G06F13/4022 ,  G06F13/4282 ,  H01L25/0657 ,  H01L25/18 ,  H01L23/562 ,  H01L2225/06586 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06541

Abstract: According to one embodiment, a memory system includes a first chip and a second chip. The second chip is bonded with the first chip. The memory system includes a semiconductor memory device and a memory controller. The semiconductor memory device includes a memory cell array, a peripheral circuit, and an input/output module. The memory controller is configured to receive an instruction from an external host device and control the semiconductor memory device via the input/output module. The first chip includes the memory cell array. The second chip includes the peripheral circuit, the input/output module, and the memory controller.

公开(公告)号：US20210365393A1

公开(公告)日：2021-11-25

申请号：US17190757

申请日：2021-03-03

Applicant: KIOXIA CORPORATION

Inventor： Tamio SAIMEN ,  Kenji SAKAUE

IPC: G06F13/16 ,  G06F13/42

Abstract: A memory controller includes a host interface circuit connectable to a host device by a bus conforming to a memory card system specification, a data buffer circuit including a buffer memory, a tag information generation circuit configured to generate tag information associated with a command received by the host interface circuit, and a first register in which the tag information generated by the tag information generation circuit is stored, and a second register into which the tag information stored in the first register is copied after the command is fetched from the host interface circuit for processing. When a read request is made from the host interface circuit to the data buffer circuit, the data buffer circuit returns read data stored in the buffer memory upon confirming that the tag information stored in the first register and the tag information stored in the second register match each other.