-
公开(公告)号:US10147371B2
公开(公告)日:2018-12-04
申请号:US14736009
申请日:2015-06-10
Applicant: LG Display Co., Ltd.
Inventor: Wookyu Sang , Wonho Lee , Juun Park
IPC: G09G3/36 , G02F1/1343 , G02F1/1362 , G02F1/1368
Abstract: A display device includes a pixel array including a first set of subpixels of first to fourth colors and a second set of subpixels of the first to fourth colors. The display device also includes a data driver configured to generate first data voltages and second data voltages. The first data voltages have a first polarity with respect to a common voltage that is applied to the pixel array and the second data voltages have a second polarity with respect to the common voltage that is different than the first polarity. The data driver applies the first data voltages of the first polarity to the first set of subpixels of the first to fourth colors via the data line and subsequently applies the second data voltages of the second polarity to the second set of subpixels of the first to fourth colors via the data line.
-
公开(公告)号:US20250061848A1
公开(公告)日:2025-02-20
申请号:US18934529
申请日:2024-11-01
Applicant: LG Display Co., Ltd.
Inventor: Moonsoo Chung , Wookyu Sang
IPC: G09G3/3208
Abstract: An electroluminescent display device using a variable refresh rate (VRR) mode. The occurrence of a difference in luminance at a time point of a refresh rate change is reduced. thereby preventing viewers from perceiving the change of the refresh rate.
-
公开(公告)号:US11823619B2
公开(公告)日:2023-11-21
申请号:US18072118
申请日:2022-11-30
Applicant: LG Display Co., Ltd.
Inventor: Moonsoo Chung , Wookyu Sang
IPC: G09G3/3208
CPC classification number: G09G3/3208 , G09G2310/08 , G09G2320/0233 , G09G2320/0252
Abstract: An electroluminescent display device using a variable refresh rate (VRR) mode. The occurrence of a difference in luminance at a time point of a refresh rate change is reduced, thereby preventing viewers from perceiving the change of the refresh rate.
-
公开(公告)号:US20230088459A1
公开(公告)日:2023-03-23
申请号:US18072118
申请日:2022-11-30
Applicant: LG Display Co., Ltd.
Inventor: Moonsoo Chung , Wookyu Sang
IPC: G09G3/3208
Abstract: An electroluminescent display device using a variable refresh rate (VRR) mode. The occurrence of a difference in luminance at a time point of a refresh rate change is reduced, thereby preventing viewers from perceiving the change of the refresh rate.
-
公开(公告)号:US09905152B2
公开(公告)日:2018-02-27
申请号:US14984848
申请日:2015-12-30
Applicant: LG Display Co., Ltd.
Inventor: Wookyu Sang
IPC: G09G3/20 , G09G3/36 , G02F1/1362
CPC classification number: G09G3/2085 , G02F1/136286 , G09G3/3607 , G09G3/3614 , G09G3/3648 , G09G3/3674 , G09G3/3685 , G09G3/3696 , G09G2300/0426 , G09G2300/0452 , G09G2310/08 , G09G2320/0233
Abstract: A liquid crystal display is disclosed. The liquid crystal display includes subpixels of first to fourth colors arranged on each row, a first data line connected to the first color subpixel and the second color subpixel on each row, a second data line connected to the third color subpixel and the fourth color subpixel on each row, a first gate line connected on each row to subpixels of two colors selected among the first to fourth colors, a second gate line connected on each row to subpixels of two remaining colors among the first to fourth colors, a data driver configured to supply a data voltage to the first and second data lines in a time-division manner, and a gate driver configured to supply a gate pulse to the first and second gate lines in synchronization with an output timing of the data voltage.
-
公开(公告)号:US09870749B2
公开(公告)日:2018-01-16
申请号:US14833336
申请日:2015-08-24
Applicant: LG Display Co., Ltd.
Inventor: Seungjin Yoo , Wookyu Sang , Ooksang Yoo
IPC: G09G3/36
CPC classification number: G09G3/3688 , G09G3/3614 , G09G3/3648 , G09G2300/0452 , G09G2310/0224 , G09G2310/0297 , G09G2310/08 , G09G2330/023
Abstract: A display device includes a pixel array having a plurality of pixels arranged in a matrix form based on a crossing structure of data lines and gate lines, a data driver having a plurality of output channels and configured to output a data voltage, a multiplexer configured to distribute the data voltage output from the data driver to the data lines in response to first and second control signals, and a gate driver configured to output a gate pulse synchronized with the data voltage in a non-sequential manner. The first and second control signals are in antiphase, and a switching cycle of the first and second control signals is one horizontal period or two horizontal periods.
-
-
-
-
-