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公开(公告)号：US20050173779A1
公开(公告)日：2005-08-11
申请号：US10504274
申请日：2003-02-11
Applicant: Luc Wuidart , Alexandre Malherbe , Michel Bardouillet
Inventor： Luc Wuidart , Alexandre Malherbe , Michel Bardouillet
CPC classification number: H01L28/20
Abstract: The invention relates to a method and device for the irreversible reduction of the value of an integrated polycrystalline silicon resistor. The inventive method consists in temporarily subjecting the resistor to a stress current which is greater than a current (Im) for which the value of the resistor is maximum.
Abstract translation: 本发明涉及用于一体化多晶硅电阻器的值的不可逆降低的方法和装置。 本发明的方法在于使电阻器暂时受到大于电阻值最大的电流（Im）的应力电流。
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公开(公告)号：US20050122759A1
公开(公告)日：2005-06-09
申请号：US10504273
申请日：2003-02-11
Applicant: Luc Wuidart , Michel Bardouillet , Alexandre Malherbe
Inventor： Luc Wuidart , Michel Bardouillet , Alexandre Malherbe
Abstract: The invention relates to a one-time programmable memory cell and the programming method thereof. Thc invention comprises a programming transistor (MN) which is disposed in series with a polycrystalline silicon programming resistor (Rp) forming the memory element. According to the invention, the programming is non destructive with respect to the polycrystalline silicon resistor.
Abstract translation: 本发明涉及一次性可编程存储单元及其编程方法。 本发明包括与形成存储元件的多晶硅编程电阻器（Rp）串联布置的编程晶体管（MN）。 根据本发明，编程对于多晶硅电阻器是非破坏性的。
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公开(公告)号：US06882699B2
公开(公告)日：2005-04-19
申请号：US10694211
申请日：2003-10-27
Applicant: Luc Wuidart , Claude Anguille
Inventor： Luc Wuidart , Claude Anguille
Abstract: An increasing monotonic counter over n bits formed as an integrated circuit, including an assembly of 2n+1−(n+2) irreversible counting cells distributed in at least n groups of 2p−1 counting cells, where p designates the group rank, and at least n−1 parity calculators, each calculator providing a bit of rank p, increasing from the most significant bit of the result count, taking into account the states of the cells of the group of same rank.
Abstract translation: 包括形成为集成电路的n位上增加的单调计数器，包括分布在至少n个2组中的2 + n + 1 - （n + 2）个不可逆计数单元的组合， / SUP> -1计数单元，其中p表示组等级，并且至少n-1个奇偶校验计算器，每个计算器提供位p的位，从结果计数的最高有效位增加，考虑到 同等级的小组的细胞。
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14.发明授权Extraction of a binary code based on physical parameters of an integrated circuit 有权基于集成电路的物理参数提取二进制代码公开(公告)号：US06836430B2
公开(公告)日：2004-12-28
申请号：US10364848
申请日：2003-02-11
Applicant: Luc Wuidart , Michel Bardouillet , Alexandre Malherbe
Inventor： Luc Wuidart , Michel Bardouillet , Alexandre Malherbe
IPC: G11C1604
CPC classification number: G11C14/00 , H03K3/356008
Abstract: An extraction method and an integrated cell for extracting a binary value based on a propagation of an edge of a triggering signal in two electric paths, including across two voltage supply terminals: two parallel branches each including, in series, a resistor for differentiating the electric paths; a read transistor, the junction point of the resistor and of the read transistor of each branch defining an output terminal of the cell, and the gate of the read transistor of each branch being connected to the output terminal of the other branch; and a selection transistor.
Abstract translation: 一种提取方法和集成单元，用于基于两个电路中的触发信号的边缘的传播提取二进制值，包括两个电压源端：两个并联支路，每个并联支路分别包括用于区分电 路径 读取晶体管，每个分支的电阻器和读取晶体管的结点限定单元的输出端子，并且每个分支的读取晶体管的栅极连接到另一个分支的输出端子; 和选择晶体管。
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公开(公告)号：US06219263B1
公开(公告)日：2001-04-17
申请号：US08945921
申请日：1997-11-18
Applicant: Luc Wuidart
Inventor： Luc Wuidart
IPC: H02M100
CPC classification number: H02M1/4266 , H02M1/32 , Y02B70/123 , Y02P80/112
Abstract: A power factor correction circuit using a first rectifier diode to control the series charging of two capacitors and two rectifier diodes to control the parallel discharging of the two capacitors. The power factor correction circuit further includes a resistor that is series-connected with the first diode to improve the power factor and to reduce the current drawn when the voltage is turned on. The rectifier diodes are advantageously voltage limiting diodes to protect the downline circuitry against overvoltages. In one improvement, a current-controlled electronic switch is used for protection against overvoltages that are just above the peak value of the line voltage.
Abstract translation: 一种功率因数校正电路，使用第一整流二极管来控制两个电容器和两个整流二极管的串联充电，以控制两个电容器的并联放电。 功率因数校正电路还包括与第一二极管串联连接的电阻器，以提高功率因数并降低当电压接通时拉出的电流。 整流二极管有利的是限压二极管，以保护下行线路电路免受过电压。 在一个改进中，电流控制的电子开关用于防止刚刚高于线路电压峰值的过电压。
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Patent Agency Ranking
公开(公告)号：US5774350A
公开(公告)日：1998-06-30
申请号：US628831
申请日：1996-04-05
Applicant: Joseph Notaro , Antoine Pavlin , Jean-Michel Ravon , Luc Wuidart
Inventor： Joseph Notaro , Antoine Pavlin , Jean-Michel Ravon , Luc Wuidart
CPC classification number: H02M7/217 , H02M3/33592 , Y02B70/1475
Abstract: A circuit for controlling two power transistors (24, 26) used an synchronous rectifiers in the secondary side of a switched mode power supply is provided. Current detector circuits (40, 42) measure current through parasitic diodes (28, 30) of the power transistors. It is shown that the synchronisation achieved is more accurate, and the resultant device is simpler and cheaper than previous solutions.
Abstract translation: 提供一种用于控制两个功率晶体管（24,26）的电路，其在开关模式电源的次级侧使用同步整流器。 电流检测器电路（40,42）测量通过功率晶体管的寄生二极管（28,30）的电流。 显示所实现的同步更准确，所得到的设备比以前的解决方案更简单和便宜。
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公开(公告)号：US09407307B2
公开(公告)日：2016-08-02
申请号：US14123745
申请日：2012-04-18
Applicant: Luc Wuidart
Inventor： Luc Wuidart
IPC: H04Q5/22 , H04B1/3816 , G06K19/07
CPC classification number: H04B1/3816 , G06K7/10297 , G06K19/0701 , G06K19/0723 , H04B5/0025
Abstract: A method for assisting with positioning of an electromagnetic transponder by a user with respect to a terminal, wherein: a current value of a ratio of the current coupling factor between the transponder and the terminal to an optimum coupling factor with a first resistive load value is calculated and stored; the current value is compared with a previous value of this ratio, stored in a previous iteration; and data elements intended for the user are controlled according to the comparison.
Abstract translation: 一种用于辅助用户相对于终端定位电磁转发器的方法，其中：应答器和终端之间的当前耦合因子与具有第一电阻负载值的最佳耦合因子的比率的当前值是 计算和存储; 将当前值与该比率的先前值进行比较，存储在先前的迭代中; 并且根据比较来控制用于用户的数据元素。
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18.发明授权公开(公告)号：US08798533B2
公开(公告)日：2014-08-05
申请号：US13151622
申请日：2011-06-02
Applicant: Luc Wuidart
Inventor： Luc Wuidart
IPC: H04B5/00
CPC classification number: G06K19/0723 , G06K19/0701 , G06K19/0715
Abstract: A method for evaluating the current coupling factor between an electromagnetic transponder and a terminal, and a transponder implementing this method, wherein a ratio between data representative of a voltage across an oscillating circuit of the transponder and obtained for two capacitance values of the oscillating circuit is compared with one or several thresholds.
Abstract translation: 一种用于评估电磁应答器和终端之间的当前耦合因子的方法以及实现该方法的应答器，其中表示应答器的振荡电路之间的电压并且针对振荡电路的两个电容值获得的电压之间的比率是 与一个或几个阈值相比。
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公开(公告)号：US20110140852A1
公开(公告)日：2011-06-16
申请号：US12815776
申请日：2010-06-15
Applicant: Luc Wuidart
Inventor： Luc Wuidart
IPC: H04Q5/22
CPC classification number: G06K19/0723 , G06K19/0707 , G06K19/0712 , G06K19/0715
Abstract: A method of evaluation, by an electromagnetic transponder in the field of a terminal generating a magnetic field, of power that can be extracted from this field, including the steps of: evaluating the current coupling between the transponder and the terminal; and deducing therefrom information relative to the power available in this coupling position.
Abstract translation: 一种通过在产生磁场的终端的领域中的电磁应答器进行评估的能够从该场提取的功率的方法，包括以下步骤：评估应答器与终端之间的当前耦合; 并从其中推导出相对于在该耦合位置中可用的功率的信息。
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20.发明授权公开(公告)号：US07941672B2
公开(公告)日：2011-05-10
申请号：US10268459
申请日：2002-10-10
Applicant: Luc Wuidart , Michel Bardouillet , Laurent Plaza
Inventor： Luc Wuidart , Michel Bardouillet , Laurent Plaza
CPC classification number: G07F7/1008 , G06Q20/341 , G07F7/082 , H01L23/544 , H01L23/57 , H01L2223/54473 , H01L2924/0002 , H04L9/0866 , H01L2924/00
Abstract: A method and a circuit for generating a secret quantity based on an identifier of an integrated circuit, including combining a first digital word derived from a physical parameter network with a second word stored in a non-volatile memory element.
Abstract translation: 一种用于基于集成电路的标识符生成秘密量的方法和电路，包括组合从物理参数网络导出的第一数字字与存储在非易失性存储元件中的第二字。
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