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34 条记录 (耗时 0.017 秒)

    Electronic circuit provided with a neutralization device
    6.
    发明授权
    Electronic circuit provided with a neutralization device 失效
    电子电路配有中和装置

    公开(公告)号：US06252442B1

    公开(公告)日：2001-06-26

    申请号：US08931189

    申请日：1997-09-16

    申请人： Alexandre Malherbe

    发明人： Alexandre Malherbe

    IPC分类号： H03L700

    CPC分类号： H03K17/22

    摘要： A neutralization device is provided that is designed to block the operation of an electronic circuit when this device is insufficiently supplied. The device is designed especially for electronic circuits supplied with low supply voltages. The neutralization device comprises, upline with respect to an inhibiting means to block the operation of the electronic circuit, a control circuit reproducing the critical path or the potential critical paths of the functional electronic circuit in the form of elementary circuits. The deactivation of the inhibiting means is done only when the totality of the elementary circuits deliver same-state elementary signals indicating that the supply voltage is sufficient to ensure their efficient operation. The invention is useful in fields requiring low supply voltages such as mobile telephony or portable microcomputers.

    摘要翻译： 提供了一种中和装置，其被设计成当该装置供应不足时阻止电子电路的操作。 该器件专为低电源供电的电路而设计。 中和装置包括关于阻止电子电路的操作的禁止装置的上行，控制电路以基本电路的形式再现功能电子电路的关键路径或潜在的关键路径。 禁止装置的去激活仅在基本电路的总和传送指示电源电压足以确保其有效操作的同时状态的基本信号时完成。 本发明在需要低电源电压的领域如移动电话或便携式微型计算机中是有用的。

    Device for the regeneration of a clock signal
    7.
    发明授权
    Device for the regeneration of a clock signal 有权

    公开(公告)号：US06362671B1

    公开(公告)日：2002-03-26

    申请号：US09771364

    申请日：2001-01-26

    申请人： Alexandre Malherbe ,  Fabrice Marinet ,  Alain Pomet

    发明人： Alexandre Malherbe ,  Fabrice Marinet ,  Alain Pomet

    IPC分类号： H03K501

    摘要： A device for the regeneration of a clock signal from an external serial bus includes a ring oscillator and counter. The ring oscillator provides n phases of a clock signal. Of these n phases, one phase is used as a reference and is applied to the counter. It is thus possible to count the number of entire reference clock signal periods between a first pulse and a second pulse received from the bus. In reading the state of the phases in the oscillator upon reception of the second pulse, a determination is made for a current phase corresponding to the phase delay between the reference clock signal and the second pulse of the bus. By using a regeneration device that also includes a ring oscillator and a counter, it is possible to regenerate the clock signal of the bus with high precision.

    Integrated circuit with fast starting function for reference voltage of reference current sources
    8.
    发明授权
    Integrated circuit with fast starting function for reference voltage of reference current sources 失效
    具有参考电流源参考电压快速起动功能的集成电路

    公开(公告)号：US5642037A

    公开(公告)日：1997-06-24

    申请号：US521516

    申请日：1995-08-30

    申请人： Alexandre Malherbe

    发明人： Alexandre Malherbe

    IPC分类号： H02J1/00 ,  G05F3/24 ,  G05F3/26 ,  G05F3/16

    CPC分类号： G05F3/245 ,  G05F3/262

    摘要： A reference level generator in integrated circuit form comprises at least one first current circulation arm in which there are, in series, an N channel transistor and a P channel transistor, one of which is referred to as a reference transistor. The reference transistor has a drain connected to a gate in normal mode, the gate being connected to an output of the generator. Standby mode transistors are interposed between each current circulation arm and a supply terminal, and a mode control input gives a mode signal that turns the standby transistors off in standby mode and turns the standby transistors on in normal mode. A transistor controlled by the mode signal may be connected between the output and a non-floating reference potential, or a pass-gate may be inserted between the gate and the drain of the reference transistor, this gate being controlled by the mode signal to be off in the standby mode.

    摘要翻译： 集成电路形式的参考电平发生器包括至少一个第一电流循环臂，其中串联有N沟道晶体管和P沟道晶体管，其中之一被称为参考晶体管。 参考晶体管具有以正常模式连接到栅极的漏极，栅极连接到发生器的输出端。 待机模式晶体管插入在每个电流循环臂和电源端子之间，并且模式控制输入给出模式信号，使备用晶体管在待机模式下关闭，并使正常模式下的待机晶体管导通。 由模式信号控制的晶体管可以连接在输出和非浮置参考电位之间，或者可以在参考晶体管的栅极和漏极之间插入通栅，该栅极由模式信号控制为 在待机模式下关闭。