Abstract:
An image processing apparatus including first circuitry, second circuitry, third circuitry, and fourth circuitry is provided. The first circuitry determines a frame miss rate according to a current frame rate and a target frame rate of an image signal. The second circuitry decreases the target frame rate to the current frame rate when the frame miss rate is greater than a first threshold. The third circuitry increases the target frame rate to an upper-limit frame rate which is determined according to the frame rendering time or memory bandwidth capability, when the frame miss rate is less than a second threshold which is smaller than the first threshold. The fourth circuitry applies the decreased or increased target frame rate for an image to be displayed.
Abstract:
A method for performing processor resource allocation in an electronic device is provided, where the method may include the steps of: obtaining task-related information to determine whether a task of a plurality of tasks is a heavy task (e.g. the heavy task may correspond to heavier loading than others of the plurality of tasks), to selectively utilize a specific processor core within a plurality of processor cores to perform the task, and determining whether at least one scenario task exists within others of the plurality of tasks, to selectively determine according to application requirements a minimum processor core count and a minimum operating frequency for performing the at least one scenario task; and performing processor resource allocation according to a power table and system loading, to perform any remaining portion of the plurality of tasks. An apparatus for performing processor resource allocation according to the above method is provided.
Abstract:
Energy efficiency is managed in a multi-cluster system. The system detects an event in which a current operating frequency of an active cluster enters or crosses any of one or more predetermined frequency spots of the active cluster, wherein the active cluster includes one or more first processor cores. When the event is detected, the system performs the following steps: (1) identifying a target cluster including one or more second processor cores, wherein the each first processor core in the first cluster and each second processor core in the second cluster have different energy efficiency characteristics; (2) activating at least one second processor core in the second cluster; (3) determining whether to migrate one or more interrupt requests from the first cluster to the second cluster; and (4) determining whether to deactivate at least one first processor core of the active cluster based on a performance and power requirement.
Abstract:
A task scheduling method is applied to a heterogeneous multi-core processor system. The heterogeneous multi-core processor system has at least one first processor core and at least one second processor core. The task scheduling method includes: referring to task priorities of tasks of the heterogeneous processor cores to identify at least one first task of the tasks that belongs to a first priority task group, wherein each first task belonging to the first priority task group has a task priority not lower than task priorities of other tasks not belonging to the first priority task group; and dispatching at least one of the at least one first task to at least one run queue of at least one of the at least one first processor core.