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    Apparatus and method for controlling multi-core processor of computing system
    1.
    发明授权
    Apparatus and method for controlling multi-core processor of computing system 有权

    公开(公告)号：US10031574B2

    公开(公告)日：2018-07-24

    申请号：US14845879

    申请日：2015-09-04

    Applicant: MediaTek Inc.

    Inventor： Jih-Ming Hsu ,  Yen-Lin Lee ,  Jia-Ming Chen ,  Shih-Yen Chiu ,  Chung-Ho Chang ,  Ya-Ting Chang ,  Ming-Hsien Lee

    IPC: G06F1/32

    Abstract: A computing system includes a multi-core processor and a core controller. The core controller is for: monitoring utilization of the multi-core processor; calculating a target performance index according to the utilization of the multi-core processor, a target utilization and a first performance index, wherein the first performance index is associated with a first entry of a dynamic voltage frequency scaling (DVFS) table that corresponds to a current setting for the multi-core processor; and selecting a second entry of the DVFS table that corresponds to a target-setting according to the target performance index and a second performance index that is associated with the second entry. The target-setting is used to configure the multi-core processor.

    CLEARANCE MODE IN A MULTICORE PROCESSOR SYSTEM
    3.
    发明申请
    CLEARANCE MODE IN A MULTICORE PROCESSOR SYSTEM 审中-公开
    多处理器系统中的透明模式

    公开(公告)号：US20160314024A1

    公开(公告)日：2016-10-27

    申请号：US15098876

    申请日：2016-04-14

    Applicant: MediaTek Inc.

    Inventor： Ya-Ting Chang ,  Ming-Ju Wu ,  Pi-Cheng Chen ,  Jia-Ming Chen ,  Chung-Ho Chang ,  Pi-Cheng Hsiao ,  Hung-Lin Chou ,  Shih-Yen Chiu

    IPC: G06F9/50

    CPC classification number: G06F9/5088 ,  G06F1/3203 ,  G06F1/3287 ,  G06F1/329 ,  G06F9/5022 ,  G06F9/5094 ,  Y02D10/171 ,  Y02D10/22 ,  Y02D10/24 ,  Y02D50/20

    Abstract: A computing system supports a clearance mode for its processor cores. The computing system can transition a target processor core from an active mode into a clearance mode according to a system policy. The system policy determines the number of processor cores to be in the active mode. The transitioning into the clearance mode includes the operations of migrating work from the target processor core to one or more other processor cores in the active mode in the computing system; and removing the target processor core from a scheduling configuration of the computing system to prevent task assignment to the target processor core. When the target processor core is in the clearance mode, the target processor core is maintained in an online idle state in which the target processor core performs no work.

    Abstract translation: 计算系统支持其处理器核心的清除模式。 计算系统可以根据系统策略将目标处理器核心从活动模式转换到清除模式。 系统策略确定处于活动模式的处理器核心数。 过渡到清除模式包括在计算系统中将工作从目标处理器核心迁移到活动模式中的一个或多个其他处理器核心的操作; 以及从所述计算系统的调度配置中移除所述目标处理器核以防止对所述目标处理器核心的任务分配。 当目标处理器核心处于清除模式时，目标处理器核心维持在目标处理器核心不工作的在线空闲状态。

    Switch policy for hybrid scheduling in multi-processor systems
    5.
    发明授权
    Switch policy for hybrid scheduling in multi-processor systems 有权

    公开(公告)号：US11138037B2

    公开(公告)日：2021-10-05

    申请号：US16168407

    申请日：2018-10-23

    Applicant: MediaTek Inc.

    Inventor： Ya-Ting Chang ,  Chien-Hao Chiang ,  Ting-Chang Huang ,  Jing-Ting Wu ,  Jia-Ming Chen

    IPC: G06F9/48 ,  G06F1/329 ,  G06F9/50 ,  G06F15/16

    Abstract: A multi-processor system includes multiple processors arranged in multiple clusters. Different clusters have different power and performance characteristics. The system includes a task scheduler to schedule tasks to the processors. The task scheduler, in response to detection of a scheduling event trigger, is operative to identify a scheduling objective between a first objective of energy optimization and a second objective of load balance. The scheduling objective is identified based on at least respective operating frequencies and loading of all processors in a highest-capacity cluster of the multiple clusters. According to the identified scheduling objective, the task scheduler schedules a given task to a processor selected among the processors in the multiple clusters.

    SWITCH POLICY FOR HYBRID SCHEDULING IN MULTI-PROCESSOR SYSTEMS
    6.
    发明申请
    SWITCH POLICY FOR HYBRID SCHEDULING IN MULTI-PROCESSOR SYSTEMS 审中-公开

    公开(公告)号：US20190129752A1

    公开(公告)日：2019-05-02

    申请号：US16168407

    申请日：2018-10-23

    Applicant: MediaTek Inc.

    Inventor： Ya-Ting Chang ,  Chien-Hao Chiang ,  Ting-Chang Huang ,  Jing-Ting Wu ,  Jia-Ming Chen

    IPC: G06F9/48 ,  G06F15/16 ,  G06F9/50 ,  G06F1/32

    Abstract: A multi-processor system includes multiple processors arranged in multiple clusters. Different clusters have different power and performance characteristics. The system includes a task scheduler to schedule tasks to the processors. The task scheduler, in response to detection of a scheduling event trigger, is operative to identify a scheduling objective between a first objective of energy optimization and a second objective of load balance. The scheduling objective is identified based on at least respective operating frequencies and loading of all processors in a highest-capacity cluster of the multiple clusters. According to the identified scheduling objective, the task scheduler schedules a given task to a processor selected among the processors in the multiple clusters.

    METHOD FOR PERFORMING PROCESSOR RESOURCE ALLOCATION IN AN ELECTRONIC DEVICE, AND ASSOCIATED APPARATUS
    7.
    发明申请
    METHOD FOR PERFORMING PROCESSOR RESOURCE ALLOCATION IN AN ELECTRONIC DEVICE, AND ASSOCIATED APPARATUS 审中-公开
    在电子设备中执行处理器资源分配的方法及相关设备

    公开(公告)号：US20160350156A1

    公开(公告)日：2016-12-01

    申请号：US14967387

    申请日：2015-12-14

    Applicant: MEDIATEK INC.

    Inventor： Tzu-Jen Lo ,  Yu-Ming Lin ,  Jia-Ming Chen ,  Ya-Ting Chang ,  Nicholas Ching Hui Tang ,  Yin Chen ,  Hung-Lin Chou

    IPC: G06F9/50

    CPC classification number: G06F9/505 ,  G06F9/46

    Abstract: A method for performing processor resource allocation in an electronic device is provided, where the method may include the steps of: obtaining task-related information to determine whether a task of a plurality of tasks is a heavy task (e.g. the heavy task may correspond to heavier loading than others of the plurality of tasks), to selectively utilize a specific processor core within a plurality of processor cores to perform the task, and determining whether at least one scenario task exists within others of the plurality of tasks, to selectively determine according to application requirements a minimum processor core count and a minimum operating frequency for performing the at least one scenario task; and performing processor resource allocation according to a power table and system loading, to perform any remaining portion of the plurality of tasks. An apparatus for performing processor resource allocation according to the above method is provided.

    Abstract translation: 提供了一种用于在电子设备中执行处理器资源分配的方法，其中该方法可以包括以下步骤：获得任务相关信息以确定多个任务的任务是否是重任务（例如重任务可能对应于 选择性地利用多个处理器核心内的特定处理器核心来执行任务，以及确定在所述多个任务的其他任务内是否存在至少一个场景任务，以选择性地确定 对应用需求的最小处理器核心数和用于执行所述至少一个场景任务的最小操作频率; 以及根据功率表和系统加载来执行处理器资源分配，以执行所述多个任务的任何剩余部分。 提供了一种根据上述方法执行处理器资源分配的装置。

    CPU CONTROL METHOD, ELECTRONIC SYSTEM CONTROL METHOD AND ELECTRONIC SYSTEM
    8.
    发明申请
    CPU CONTROL METHOD, ELECTRONIC SYSTEM CONTROL METHOD AND ELECTRONIC SYSTEM 有权
    CPU控制方法，电子系统控制方法和电子系统

    公开(公告)号：US20160179747A1

    公开(公告)日：2016-06-23

    申请号：US14890427

    申请日：2015-04-24

    Applicant: MEDIATEK INC.

    Inventor： Chun-Hang Wei ,  Hung-Lin Chou ,  Nicholas Ching Hui Tang ,  Jia-Ming Chen ,  Ya-Ting Chang ,  Fan-Lei Liao

    IPC: G06F15/82 ,  G06F9/30

    CPC classification number: G06F15/82 ,  G06F9/30098 ,  G06F9/5055 ,  G06F9/5066

    Abstract: A CPU control method for controlling a first CPU and a second CPU The method comprises: (a) applying the first CPU to execute a first group of codes comprising at least one code if the first CPU is operating to perform a first function; and (c) applying the second CPU to execute a second group of codes comprising at least one code if the second CPU is operating to perform the first function. The first group of codes is optimized for the first CPU, the second group of codes is optimized for the second CPU and the first group of codes comprises at least one code different from the code for the second group of codes.

    Abstract translation: 一种用于控制第一CPU和第二CPU的CPU控制方法该方法包括：（a）如果第一CPU正在操作以执行第一功能，则应用第一CPU执行包括至少一个代码的第一组代码; 以及（c）如果所述第二CPU正在操作以执行所述第一功能，则应用所述第二CPU执行包括至少一个代码的第二组代码。 第一组代码针对第一个CPU进行了优化，第二组代码针对第二个CPU进行了优化，第一组代码包括与第二组代码不同的代码中的至少一个代码。

    TASK SCHEDULING METHOD FOR DISPATCHING TASKS BASED ON COMPUTING POWER OF DIFFERENT PROCESSOR CORES IN HETEROGENEOUS MULTI-CORE SYSTEM AND RELATED NON-TRANSITORY COMPUTER READABLE MEDIUM
    9.
    发明申请
    TASK SCHEDULING METHOD FOR DISPATCHING TASKS BASED ON COMPUTING POWER OF DIFFERENT PROCESSOR CORES IN HETEROGENEOUS MULTI-CORE SYSTEM AND RELATED NON-TRANSITORY COMPUTER READABLE MEDIUM 审中-公开
    基于异构多核系统中不同处理器的计算能力分配任务的任务调度方法和相关非终端计算机可读介质

    公开(公告)号：US20150121387A1

    公开(公告)日：2015-04-30

    申请号：US14480646

    申请日：2014-09-09

    Applicant: MEDIATEK INC.

    Inventor： Ya-Ting Chang ,  Jia-Ming Chen ,  Yu-Ming Lin ,  Yin Chen ,  Hung-Lin Chou ,  Yeh-Ji Chou ,  Shou-Wen Ho

    IPC: G06F9/48

    CPC classification number: G06F9/4881 ,  G06F2209/483 ,  G06F2209/501

    Abstract: A task scheduling method is applied to a heterogeneous multi-core system. The heterogeneous multi-core system has at least one first processor core and at least one second processor core. The task scheduling method includes: referring to task priorities of tasks of the heterogeneous processor cores to identify at least one first task of the tasks that belongs to a first priority task group, wherein each first task belonging to the first priority task group has a task priority not lower than task priorities of other tasks not belonging to the first priority task group; and dispatching at least one of the at least one first task to at least one run queue of at least one of the at least one first processor core.

    Abstract translation: 任务调度方法应用于异构多​​核系统。 异构多核系统具有至少一个第一处理器核和至少一个第二处理器核。 任务调度方法包括：参考异构处理器核的任务的任务优先级，以识别属于第一优先级任务组的任务的至少一个第一任务，其中属于第一优先级任务组的每个第一任务具有任务 优先级不低于不属于第一优先级任务组的其他任务的任务优先级; 以及将所述至少一个第一任务中的至少一个调度到所述至少一个第一处理器核心中的至少一个的至少一个运行队列。

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