-
公开(公告)号:US20240056380A1
公开(公告)日:2024-02-15
申请号:US18174701
申请日:2023-02-27
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Zvi Rechtman , Guy Lederman , Stanislav Gurtovoy , Ran Ravid , Lavi Koch , Oded Nadir
Abstract: In one embodiment, a multi-segment communication network system includes nodes connected via links, a first node including a first receiver and transmitter, and a second node including a second receiver and transmitter, wherein the first transmitter is to transmit a link training frame including a training pattern to the second receiver, which is to receive the link training frame, the second node is to find a tuning factor to which to tune the first transmitter responsively to the training pattern, and generate a request indicative of the found tuning factor, the second transmitter is to send the request in the link training frame via a plurality of the links to the first receiver, the first receiver is to receive the request, and the first node is to tune at least one parameter of the first transmitter based on the tuning factor indicated in the request.
-
公开(公告)号:US11552871B2
公开(公告)日:2023-01-10
申请号:US16900931
申请日:2020-06-14
Applicant: Mellanox Technologies, Ltd.
Inventor: Ran Sela , Liron Mula , Ran Ravid , Guy Lederman , Dotan David Levi
IPC: H04L43/106 , H04J3/06 , H04L43/0852 , G06F15/173 , H04L7/00
Abstract: In one embodiment, a network device, includes a network interface port configured to receive data symbols from a network node over a packet data network, at least some of the symbols being included in data packets, and controller circuitry including physical layer (PHY) circuitry, which includes receive PHY pipeline circuitry configured to process the received data symbols, and a counter configured to maintain a counter value indicative of a number of the data symbols in the receive PHY pipeline circuitry.
-
公开(公告)号:US11336383B2
公开(公告)日:2022-05-17
申请号:US16910193
申请日:2020-06-24
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Liron Mula , Dotan David Levi , Ran Ravid , Guy Lederman
IPC: H04J3/06 , H04L12/46 , H04L43/0852 , H04L69/22
Abstract: In certain exemplary embodiments, a switching device is provided, including an input interface configured to communicate with a packet source, an output interface configured to communicate with a packet destination, and packet processing circuitry. The packet processing circuitry is configured to receive a plurality of packets from the packet source via the input interface, each of the plurality of packets being associated with a packet descriptor, at least one of the packet descriptors being a transmission time packet descriptor including a desired physical transmission time for the packet associated with the transmission time packet descriptor, to receive an indication of a clock time, and for each packet associated with a transmission time packet descriptor, to physically transmit the packet associated with the transmission time packet descriptor, via the output interface, at a clock time corresponding to the desired physical transmission time. Related apparatus an methods are also provided.
-
-