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公开(公告)号:US20240073141A1
公开(公告)日:2024-02-29
申请号:US17895108
申请日:2022-08-25
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Niv Aibester , Gil Levy , Yuval Shpigelman
Abstract: A network device includes multiple ports, a Shared Buffer (SB) and a SB controller. The ports to connect to a communication network. The SB to temporarily store packets received from the communication network via the ports, the packets belonging to multiple flows. The SB controller to allocate one or more flow-specific storage regions in the SB, a given flow-specific storage region being allocated to store the packets that (i) belong to respective one or more of the flows and (ii) are to be transmitted via a respective egress queue. In response to detecting that an occupancy level in the given flow-specific storage region exceeds a specified occupancy threshold, the SB controller to report the flows in the given flow-specific storage region as congested.
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公开(公告)号:US20230283575A1
公开(公告)日:2023-09-07
申请号:US17588385
申请日:2022-01-31
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Niv Aibester , Barak Gafni
IPC: H04L49/103 , H04L49/9005 , H04L49/9047 , H04L45/122 , H04L47/30
CPC classification number: H04L49/103 , H04L45/122 , H04L47/30 , H04L49/9005 , H04L49/9047
Abstract: A network device includes one or more ports, a packet processor, and a memory management circuit. The one or more ports are to communicate packets over a network. The packet processor is to process the packets using a plurality of queues. The memory management circuit is to maintain a shared buffer in a memory and adaptively allocate memory resources from the shared buffer to the queues, to maintain in the memory, in addition to the shared buffer, a shared-reserve memory pool for use by a defined subset of the queues, to identify in the subset a queue that (i) requires additional memory resources, (ii) is not eligible for additional allocation from the shared buffer, and (iii) meets an eligibility condition for the shared-reserve memory pool, and to allocate memory resources to the identified queue from the shared-reserve memory pool.
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公开(公告)号:US11425230B2
公开(公告)日:2022-08-23
申请号:US17160407
申请日:2021-01-28
Applicant: Mellanox Technologies, Ltd.
Inventor: Liron Mula , Aviv Kfir , Amir Mizrahi , Niv Aibester
IPC: H04L49/354 , H04L49/90 , H04L69/22 , H04L69/12
Abstract: A parsing apparatus includes an interface, a first parser, a second parser and a controller. The interface is configured to receive packets belonging to a plurality of predefined packet types. The first parser is configured to identify any of the packet types. The second parser is configured to identify only a partial subset of the packet types. The controller is configured to receive a packet via the interface, to attempt identifying a packet type of the received packet using the second parser, and in response to detecting that identifying the packet type using the second parser fails, to revert to identify the packet type of the received packet using the first parser.
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公开(公告)号:US20250044981A1
公开(公告)日:2025-02-06
申请号:US18229509
申请日:2023-08-02
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Niv Aibester , Eyal Srebro , Liron Mula , Amit Kazimirsky
IPC: G06F3/06
Abstract: A network device, a network interface controller, and a switch are provided. In one example, a shared buffer includes a plurality of cells of memory, one or more ports read data from the shared buffer and write data to the shared buffer, and a controller circuit selectively enables and disables cells of memory of the shared buffer based on an amount of data stored in the shared buffer. Power consumption of the shared buffer is in proportion to a number of enabled cells of memory.
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公开(公告)号:US12192122B2
公开(公告)日:2025-01-07
申请号:US18581423
申请日:2024-02-20
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Niv Aibester , Barak Gafni
IPC: H04L49/103 , H04L45/122 , H04L47/30 , H04L49/9005 , H04L49/9047
Abstract: A device includes ports, a packet processor, and a memory management circuit. The ports communicate packets over a network. The packet processor processes the packets using queues. The memory management circuit maintains a shared buffer in a memory and adaptively allocates memory resources from the shared buffer to the queues, maintains in the memory, in addition to the shared buffer, a shared-reserve memory pool for use by the queues, identifies, among the queues, a queue that requires additional memory resources, the queue having an occupancy that is (i) above a current value of a dynamic threshold, rendering the queue ineligible for additional allocation from the shared buffer, and (ii) no more than a defined margin above the current value of the dynamic threshold, rendering the queue eligible for allocation from the shared-reserve memory pool, and allocates memory resources to the identified queue from the shared-reserve memory pool.
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公开(公告)号:US20240195754A1
公开(公告)日:2024-06-13
申请号:US18581423
申请日:2024-02-20
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Niv Aibester , Barak Gafni
IPC: H04L49/103 , H04L45/122 , H04L47/30 , H04L49/9005 , H04L49/9047
CPC classification number: H04L49/103 , H04L45/122 , H04L47/30 , H04L49/9005 , H04L49/9047
Abstract: A device includes ports, a packet processor, and a memory management circuit. The ports communicate packets over a network. The packet processor processes the packets using queues. The memory management circuit maintains a shared buffer in a memory and adaptively allocates memory resources from the shared buffer to the queues, maintains in the memory, in addition to the shared buffer, a shared-reserve memory pool for use by the queues, identifies, among the queues, a queue that requires additional memory resources, the queue having an occupancy that is (i) above a current value of a dynamic threshold, rendering the queue ineligible for additional allocation from the shared buffer, and (ii) no more than a defined margin above the current value of the dynamic threshold, rendering the queue eligible for allocation from the shared-reserve memory pool, and allocates memory resources to the identified queue from the shared-reserve memory pool.
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公开(公告)号:US20230120745A1
公开(公告)日:2023-04-20
申请号:US17503383
申请日:2021-10-18
Applicant: MELLANOX TECHNOLOGIES, LTD.
Inventor: Niv Aibester , Gil Levy , Liron Mula , Barak Gafni , Aviv Kfir
IPC: H04L12/861 , H04L12/879 , H04L12/933 , H04L12/925 , H04L12/911
Abstract: A network device includes multiple ports, packet processing circuitry, a memory and a reserved-memory management circuit (RMMC). The ports are to communicate packets over a network. The packet processing circuitry is to process the packets using a plurality of queues. The memory is to store a shared buffer. The RMMC is to allocate segments of the shared buffer to the queues, including allocating reserve segments of the shared buffer to selected queues that meet a reserve-allocation criterion.
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