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1.
公开(公告)号:US12132648B2
公开(公告)日:2024-10-29
申请号:US17594543
申请日:2020-03-23
发明人: David Charles Hewson , Partha Kundu
IPC分类号: H04L45/28 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/28 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , H04L69/28
CPC分类号: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/28 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
摘要: A network interface controller (NIC) capable of efficient load balancing among the hardware engines is provided. The NIC can be equipped with a plurality of ordering control units (OCUs), a queue, a selection logic block, and an allocation logic block. The selection logic block can determine, from the plurality of OCUs, an OCU for a command from the queue, which can store one or more commands. The allocation logic block can then determine a selection setting for the OCU, select an egress queue for the command based on the selection setting, and send the command to the egress queue.
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2.
公开(公告)号:US20240323114A1
公开(公告)日:2024-09-26
申请号:US18678040
申请日:2024-05-30
IPC分类号: H04L45/28 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/28 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/28 , H04L69/40
CPC分类号: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/28 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
摘要: A data-driven intelligent networking system that can facilitate tracing of data flow packets is provided. The system add tracer packets to data flow packets arriving at an ingress point of the network. As the tracer packets progress through network in-band with the data flow packets, the system can copy, at each switch, trace data into pre-defined fields in the tracer packets. When the data flow packets arrive at an egress point of the network the system can separate the trace data from the data flow packet for analysis. Based on the analysis of the trace data, the system can adopt one or more policies to mitigate the impact of congestion on time-sensitive applications.
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公开(公告)号:US12101260B1
公开(公告)日:2024-09-24
申请号:US18108544
申请日:2023-02-10
申请人: Innovium, Inc.
IPC分类号: H04L12/26 , H04L45/16 , H04L45/24 , H04L47/22 , H04L47/30 , H04L47/32 , H04L47/41 , H04L47/625 , H04L47/6275 , H04L49/90 , H04L49/9015 , H04L49/9047
CPC分类号: H04L47/41 , H04L45/16 , H04L45/24 , H04L47/22 , H04L47/30 , H04L47/32 , H04L47/6255 , H04L47/6275 , H04L49/9015 , H04L49/9047 , H04L49/9089
摘要: When a measure of buffer space queued for garbage collection in a network device grows beyond a certain threshold, one or more actions are taken to decreasing an enqueue rate of certain classes of traffic, such as of multicast traffic, whose reception may have caused and/or be likely to exacerbate garbage-collection-related performance issues. When the amount of buffer space queued for garbage collection shrinks to an acceptable level, these one or more actions may be reversed. In an embodiment, to more optimally handle multi-destination traffic, queue admission control logic for high-priority multi-destination data units, such as mirrored traffic, may be performed for each destination of the data units prior to linking the data units to a replication queue. If a high-priority multi-destination data unit is admitted to any queue, the high-priority multi-destination data unit can no longer be dropped, and is linked to a replication queue for replication.
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公开(公告)号:US12081448B2
公开(公告)日:2024-09-03
申请号:US17360126
申请日:2021-06-28
申请人: Synamedia Limited
发明人: Avi Fruchter , Ilan Cohen , Zorach Reuven Wachtfogel , Uziel Joseph Harband , Einav Rivni , Thomas Paul Burnley
摘要: Various implementations disclosed herein include devices, systems, and methods for reducing a decode delay at a client device. In some implementations, a device includes one or more processors and a non-transitory memory. In some implementations, a method includes determining that a client device is being switched from a real-time content presentation mode in which the client device presents real-time content to a buffered content presentation mode in which the client device presents buffered content. In some implementations, the method includes transmitting, to the client device, video frames corresponding to the buffered content at a first transmission rate. In some implementations, the method includes changing the first transmission rate to a second transmission rate based on an indication that a number of bits stored in a buffer of the client device satisfies a decode threshold.
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公开(公告)号:US20240259315A1
公开(公告)日:2024-08-01
申请号:US18443475
申请日:2024-02-16
IPC分类号: H04L47/122 , H04L47/17 , H04L47/30 , H04L47/35
CPC分类号: H04L47/122 , H04L47/17 , H04L47/30 , H04L47/35
摘要: A system for facilitating sender-side granular congestion control is provided. During operation, the first and second processes of an application can run on sender and receiver nodes, respectively. A first buffer on the sender node can be allocated to the first process. For the first process, the system can then identify a second buffer at a last-hop switch of the receiver node. The system can determine, based on in-flight packets, the utilization of the second buffer. The system can also determine a fraction of available space in the second buffer for packets from the first buffer based on the utilization. Subsequently, the system can determine whether the fraction of the available space can accommodate the next packet from the first buffer. If the fraction of the available space can accommodate the next packet, the system can allow the first process to send the next packet to the second process.
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公开(公告)号:US20240259302A1
公开(公告)日:2024-08-01
申请号:US18631217
申请日:2024-04-10
发明人: Edwin L. Froese
IPC分类号: H04L45/28 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/28 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/28 , H04L69/40
CPC分类号: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/28 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
摘要: Systems and methods are provided for managing a data communication within a multi-level network having a plurality of switches organized as groups, with each group coupled to all other groups via global links, including: at each switch within the network, maintaining a global fault table identifying the links which lead only to faulty global paths, and when the data communication is received at a port of a switch, determine a destination for the data communication and, route the communication across the network using the global fault table to avoid selecting a port within the switch that would result in the communication arriving at a point in the network where its only path forward is across a global link that is faulty; wherein the global fault table is used for both a global minimal routing methodology and a global non-minimal routing methodology.
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公开(公告)号:US20240244544A1
公开(公告)日:2024-07-18
申请号:US18419738
申请日:2024-01-23
发明人: Alex Volkov , Baktash Boghrati , Edward John Cunningham , Mohammad Reza Movahedi , Jeffrey Paul Solum
CPC分类号: H04W56/001 , H04L47/30 , H04R25/552 , H04R25/554 , H04W56/004 , G10H2250/631 , H03H17/0018 , H03H17/0642 , H04L2012/5681 , H04L47/263 , H04R2225/55
摘要: Disclosed herein, among other things, are methods and apparatus for providing a time-stamp based controller for synchronization of sink or source sampling rate with external packet rate. A method for wireless communications includes receiving a transmission of a packet using a wireless transceiver of an electronic device, and using a processor of the electronic device to read a first value of a system timer and store the first value as an arrival time-stamp. The packet is decoded and processed by the processor, and sent to an output. When the processed packet is sent, a second value of the system timer is read, adjusted and stored as a departure time-stamp. The arrival time-stamp and the departure time-stamp are used to calculate an adjustment stimulus for a sample rate actuator of the electronic device. The sample rate actuator is configured to maintain synchronization of sampling rate with an external packet rate.
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公开(公告)号:US20240195754A1
公开(公告)日:2024-06-13
申请号:US18581423
申请日:2024-02-20
发明人: Niv Aibester , Barak Gafni
IPC分类号: H04L49/103 , H04L45/122 , H04L47/30 , H04L49/9005 , H04L49/9047
CPC分类号: H04L49/103 , H04L45/122 , H04L47/30 , H04L49/9005 , H04L49/9047
摘要: A device includes ports, a packet processor, and a memory management circuit. The ports communicate packets over a network. The packet processor processes the packets using queues. The memory management circuit maintains a shared buffer in a memory and adaptively allocates memory resources from the shared buffer to the queues, maintains in the memory, in addition to the shared buffer, a shared-reserve memory pool for use by the queues, identifies, among the queues, a queue that requires additional memory resources, the queue having an occupancy that is (i) above a current value of a dynamic threshold, rendering the queue ineligible for additional allocation from the shared buffer, and (ii) no more than a defined margin above the current value of the dynamic threshold, rendering the queue eligible for allocation from the shared-reserve memory pool, and allocates memory resources to the identified queue from the shared-reserve memory pool.
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公开(公告)号:US20240195742A1
公开(公告)日:2024-06-13
申请号:US18063346
申请日:2022-12-08
发明人: Andrea Enrici
摘要: Example embodiments disclose a method for avoiding deadlock in a network includes generating a finite state machine indicating possible routing decisions of incoming packets for a plurality of switches, analyzing the finite state machine, determining at least one memory overflow state based on the analyzing, generating at least one anti-deadlock rule in response to determining the at least one memory overflow state, and transmitting the at least one anti-deadlock rule to the plurality of switches.
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公开(公告)号:US12004183B2
公开(公告)日:2024-06-04
申请号:US17572202
申请日:2022-01-10
申请人: ZTE Corporation
发明人: Chuangxin Jiang , Zhaohua Lu , Hao Wu , Bo Gao , YuNgok Li , Shujuan Zhang , Huahua Xiao , Wenjun Yan
CPC分类号: H04W72/23 , H04L5/0048 , H04L1/0003 , H04L1/0006
摘要: A transmitting and receiving point (TRP) divides data scheduled by one downlink control information (DCI) into N data parts, and transmits the N data parts to a receiving side, where N≥1. A value of N and whether the N data parts have a correlation in a case of N>1 are determined by at least one of following scheduling information: a transmission configuration indicator (TCI) field, a demodulation reference signal (DMRS) port indicator, a modulation and coding scheme (MCS), a redundancy version (RV) or a new data indicator (NDI). After receiving the N data parts sent by the TRP, the receiving side determines whether the N data parts have the correlation according to at least one of the TCI, the DMRS port indicator, the MCS, the RV, or the NDI.
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