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    Allocation of shared reserve memory to queues in a network device
    8.
    发明授权
    Allocation of shared reserve memory to queues in a network device 有权

    公开(公告)号：US11973696B2

    公开(公告)日：2024-04-30

    申请号：US17588385

    申请日：2022-01-31

    Applicant: MELLANOX TECHNOLOGIES, LTD.

    Inventor： Niv Aibester ,  Barak Gafni

    IPC: H04L49/103 ,  H04L45/122 ,  H04L47/30 ,  H04L49/9005 ,  H04L49/9047

    CPC classification number: H04L49/103 ,  H04L45/122 ,  H04L47/30 ,  H04L49/9005 ,  H04L49/9047

    Abstract: A network device includes one or more ports, a packet processor, and a memory management circuit. The one or more ports are to communicate packets over a network. The packet processor is to process the packets using a plurality of queues. The memory management circuit is to maintain a shared buffer in a memory and adaptively allocate memory resources from the shared buffer to the queues, to maintain in the memory, in addition to the shared buffer, a shared-reserve memory pool for use by a defined subset of the queues, to identify in the subset a queue that (i) requires additional memory resources, (ii) is not eligible for additional allocation from the shared buffer, and (iii) meets an eligibility condition for the shared-reserve memory pool, and to allocate memory resources to the identified queue from the shared-reserve memory pool.

    DEPLOYING SHADOW BUFFER IN CONTEXT OF CLOCK-SYNCHRONIZED EDGE-BASED NETWORK FUNCTIONS
    9.
    发明公开
    DEPLOYING SHADOW BUFFER IN CONTEXT OF CLOCK-SYNCHRONIZED EDGE-BASED NETWORK FUNCTIONS 审中-公开

    公开(公告)号：US20240080274A1

    公开(公告)日：2024-03-07

    申请号：US18503007

    申请日：2023-11-06

    Applicant: Clockwork Systems, Inc.

    Inventor： Shiyu Liu ,  Balaji S. Prabhakar

    IPC: H04L47/56 ,  H04L47/2425 ,  H04L47/28 ,  H04L49/9047

    CPC classification number: H04L47/56 ,  H04L47/2433 ,  H04L47/28 ,  H04L49/9047

    Abstract: A regular buffer and a shadow buffer are maintained at a receiver host. Responsive to receiving a data flow from a sender host that is clock-synchronized with the receiver host using a common reference clock, a first indication of data of the data flow is stored to the regular buffer, the shadow buffer is transitioned from an idle state to an active state, and a counter of the shadow buffer is incremented that indicates a unit of data traffic received. A dynamic drain rate is determined based on a number of units of the data removed from the regular buffer per unit of time while the shadow buffer is in the active state, where the shadow buffer reverts to an idle state responsive to a break in the receiver host receiving the data flow. Dwell time is calculated as a function of the counter of the shadow buffer and the dynamic drain rate, and a congestion signal for the data flow is determined based on the dwell time.

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