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公开(公告)号:US11615576B2
公开(公告)日:2023-03-28
申请号:US17497485
申请日:2021-10-08
Applicant: Meta Platforms Technologies, LLC
Abstract: This disclosure describes efficient communication of surface texture data between system on a chip (SOC) integrated circuits. An example system includes a first integrated circuit and a second integrated circuit communicatively coupled to the first integrated circuit by a video communication interface. The first integrated generates a superframe in a video frame of the video communication interface for transmission to the second integrated circuit. The superframe includes multiple subframe payloads that carry surface texture data to be updated in the frame and corresponding subframe headers that include parameters of the subframe payloads. The second integrated circuit includes a direct access memory (DMA) controller. The DMA upon receipt of the superframe, writes the surface texture data within each of the subframe payloads directly to an allocated location in memory based on the parameters included in the corresponding one of the subframe headers.
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公开(公告)号:US12183043B2
公开(公告)日:2024-12-31
申请号:US18182029
申请日:2023-03-10
Applicant: Meta Platforms Technologies, LLC
Inventor: Cheng Chang , Zhi Zhou , Richard Webb , Richard Lawrence Greene
IPC: G06T9/00 , G06T1/60 , H04N19/115 , H04N19/146 , H04N19/157 , H04N19/184
Abstract: A computing system may access first alpha values associated with first pixels in a first pixel region of an image and determine a bit budget for encoding the first alpha values. The computing system may then select a first alpha-encoding mode for the first alpha values to reflect a determination that the first alpha values are all fully transparent or all fully opaque, and encode the first alpha values by storing the selected first alpha-encoding mode as part of a metadata without using the bit budget to encode the first alpha values individually. The computing system may then update a record of unallocated bits available for allocation based on the bit budget unused in the encoding of the first alpha values, and allocate, based on the record of unallocated bits, bits to encode a set of alpha values different from the first alpha values.
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公开(公告)号:US11580026B2
公开(公告)日:2023-02-14
申请号:US17578392
申请日:2022-01-18
Applicant: META PLATFORMS TECHNOLOGIES, LLC
Inventor: Vlad Fruchter , Richard Lawrence Greene , Hideo Tamama
IPC: G06F12/0871 , G06F3/06 , G06F12/02 , G06F12/14
Abstract: In one embodiment, a system may include a memory unit, a first processing unit configured to write data into a memory region of the memory unit, a second processing unit configured to read data from the memory region, a first control unit configured to control the first processing unit's access to the memory unit and, and a second control unit configured to control the second processing unit's access to the memory unit. The first control unit may be configured to obtain, from the second control unit, a first memory address associated with a data reading process of the second processing unit, receive a write request from the first processing unit, the read request having an associated second memory address, and write data into the memory region based on the write request in response to a determination that the second memory address falls outside of the guarded reading region.
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公开(公告)号:US20220366820A1
公开(公告)日:2022-11-17
申请号:US17875131
申请日:2022-07-27
Applicant: Meta Platforms Technologies, LLC
Inventor: Nilanjan Goswami , Michael Yee , Morgyn Taylor , Patrick Mccleary , Naveen Makineni , Aaron Young , Zhi Zhou , Richard Lawrence Greene , Richard Webb , Cheng Chang
Abstract: In one embodiment, one or more computing systems may determine a first display content to be displayed on a display. The first display content may be associated with one or more frames. The one or more computing systems may determine an optimization operation for the first display content based on one or more first parameters associated with the display or one or more second parameters associated with the one or more frames. The one or more computing systems may adjust the one or more frames based on the optimization operation. The adjusted one or more frames may have at least one optimized attribute comparing to the one or more frames before being adjusted. The one or more computing systems may output the adjusted one or more frames to the display to represent the first display content.
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公开(公告)号:US11481323B2
公开(公告)日:2022-10-25
申请号:US16582403
申请日:2019-09-25
Applicant: Meta Platforms Technologies, LLC
Inventor: Vlad Fruchter , Richard Lawrence Greene , Hideo Tamama
Abstract: In one embodiment, one or more control units may store a position tracker associated with a first window of memory blocks and allow a first processing unit to write data within the first window. The control units may receive, from a second processing unit, a request for reading data with a memory-reading address, compare the memory-reading address to a first starting address of the first window, and prevent the second processing unit from reading the data when the memory-reading address is greater than or equal to the first starting address of the first window. The control units may store, when the data writing process is complete, an updated position tracker of a second window of memory blocks and allow the second processing unit to read the data based on a determination that the memory-reading address is less than a second starting address of the second window.
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