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    APPARATUSES AND METHODS FOR PROVIDING ADDITIONAL DRIVE TO MULTILEVEL SIGNALS REPRESENTING DATA
    12.
    发明申请
    APPARATUSES AND METHODS FOR PROVIDING ADDITIONAL DRIVE TO MULTILEVEL SIGNALS REPRESENTING DATA 审中-公开

    公开(公告)号：US20190027205A1

    公开(公告)日：2019-01-24

    申请号：US15783688

    申请日：2017-10-13

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Timothy M. Hollis ,  Dragos Dimitriu

    IPC: G11C11/4074

    Abstract: Apparatuses and methods for providing additional drive to multilevel signals representing data are described. An example apparatus includes a first driver section, a second driver section, and a third driver section. The first driver section is configured to drive an output terminal toward a first selected one of a first voltage and a second voltage. The second driver section configured to drive the output terminal toward a second selected one of the first voltage and the second voltage. The third driver section configured to drive the output terminal toward the first voltage when each of the first selected one and the second selected one is the first voltage. The third driver circuit is further configured to be in a high impedance state when the first selected one and the second selected one are different from each other.

    Reference voltage generation for single-ended communication channels
    15.
    发明授权
    Reference voltage generation for single-ended communication channels 有权

    公开(公告)号：US09244477B2

    公开(公告)日：2016-01-26

    申请号：US14059095

    申请日：2013-10-21

    Applicant: Micron Technology, Inc.

    Inventor： Dragos Dimitriu ,  Timothy Hollis

    IPC: G05F3/08 ,  H03K19/0175

    CPC classification number: G05F3/08 ,  H03K19/0175

    Abstract: An improved reference voltage (Vref) generator useable, for example, in sensing data on single-ended channels is disclosed. The Vref generator can be placed on the integrated circuit containing the receivers, or may be placed off chip. In one embodiment, the Vref generator comprises an adjustable-resistance voltage divider in combination with a current source. The voltage divider is referenced to I/O power supplies Vddq and Vssq, with Vref being generated at a node intervening between the adjustable resistances of the voltage divider. The current source injects a current into the Vref node and into a non-varying Thevenin equivalent resistance formed of the same resistors used in the voltage divider. So constructed, the voltage generated equals the sum of two terms: a first term comprising the slope between Vref and Vddq, and a second term comprising a Vref offset. Each of these terms can be independently adjusted in first and second modes: the slope term via the voltage divider, and the offset term by the magnitude of the injected current. Use of the disclosed Vref generator in one useful implementation allows Vref to be optimized at two different values for Vddq.

    MAJORITY DETECTOR APPARATUS, SYSTEMS, AND METHODS
    16.
    发明申请
    MAJORITY DETECTOR APPARATUS, SYSTEMS, AND METHODS 有权
    主要检测设备，系​​统和方法

    公开(公告)号：US20130142285A1

    公开(公告)日：2013-06-06

    申请号：US13758616

    申请日：2013-02-04

    Applicant: Micron Technology, Inc.

    Inventor： Dragos Dimitriu

    IPC: H04L25/06

    CPC classification number: H04L25/06 ,  H04L25/062

    Abstract: Apparatus, methods, and systems are disclosed, including, for example,a data receiver to receive a calibration voltage and a reference voltage to calibrate the data receiver. The output of the data receiver is provided to a first ripple counter that counts the outputs from the data receiver and provides an output count. The ripple counter may count either ones or zeros. A second ripple counter counts the number of a clock signals over the same period of time. The output count is either multiplied by two or the count of clock signals is divided by two. A ripple comparator may then compare the outputs and adjust the reference voltage based upon the comparison results.

    Abstract translation: 公开了装置，方法和系统，包括例如用于接收校准电压的数据接收器和用于校准数据接收器的参考电压。 数据接收器的输出被提供给第一纹波计数器，其对来自数据接收器的输出进行计数并提供输出计数。 纹波计数器可以计数一个或零个数。 第二个纹波计数器在同一时间段内对时钟信号的数量进行计数。 输出计数乘以2，或将时钟信号的计数除以2。 然后，纹波比较器可以比较输出并基于比较结果来调整参考电压。

    Apparatus having a data receiver with a real time clock decoding decision feedback equalizer
    17.
    发明授权
    Apparatus having a data receiver with a real time clock decoding decision feedback equalizer 有权

    公开(公告)号：US10091031B1

    公开(公告)日：2018-10-02

    申请号：US15664506

    申请日：2017-07-31

    Applicant: Micron Technology, Inc.

    Inventor： Dragos Dimitriu

    IPC: H03K5/159 ,  H04L25/03 ,  H04L7/00

    Abstract: Various embodiments include apparatus and methods having a data receiver with a real time clock decoding decision feedback equalizer. In various embodiments, a digital decision feedback loop can be implemented in a data receiver circuit, while all analog signals involved are static relative to the input signal data rate. The implemented data receiver circuit can include a number of data latches with different, but static, analog unbalances and a decision-based clock decoder. In an example, the analog unbalances may be different reference voltages. The decision-based clock decoder can be structured to activate only one data latch, the one with the desired analog unbalance. The outputs of the latches attached to the same clock decoder can be combined such that only the active latch drives the final output. Additional apparatus, systems, and methods are disclosed.

    Input buffer apparatuses and methods
    19.
    发明授权
    Input buffer apparatuses and methods 有权
    输入缓冲装置和方法

    公开(公告)号：US08929163B2

    公开(公告)日：2015-01-06

    申请号：US13839996

    申请日：2013-03-15

    Applicant: Micron Technology, Inc.

    Inventor： Jennifer Taylor ,  Dragos Dimitriu

    IPC: G11C7/00 ,  G11C7/10 ,  H03F3/45

    CPC classification number: H03F3/45179 ,  G11C7/1084 ,  H03F3/45183 ,  H03F2203/45051

    Abstract: Apparatuses and methods are disclosed, including an apparatus with a first differential amplifier to amplify an input signal into a first output signal, a second differential amplifier to amplify the input signal into a second output signal that is complementary to the first output signal, and a feedback resistance coupled between the first output signal and the second output signal. Additional apparatuses and methods are described.

    Abstract translation: 公开了一种装置和方法，包括具有将输入信号放大为第一输出信号的第一差分放大器的装置，将输入信号放大为与第一输出信号互补的第二输出信号的第二差分放大器，以及 耦合在第一输出信号和第二输出信号之间的反馈电阻。 描述附加的装置和方法。

    Majority detector apparatus, systems, and methods
    20.
    发明授权
    Majority detector apparatus, systems, and methods 有权
    多数检测仪器，系统和方法

    公开(公告)号：US08675776B2

    公开(公告)日：2014-03-18

    申请号：US13758616

    申请日：2013-02-04

    Applicant: Micron Technology, Inc.

    Inventor： Dragos Dimitriu

    IPC: H03K9/00

    CPC classification number: H04L25/06 ,  H04L25/062

    Abstract: Apparatus, methods, and systems are disclosed, including, for example, a data receiver to receive a calibration voltage and a reference voltage to calibrate the data receiver. The output of the data receiver is provided to a first ripple counter that counts the outputs from the data receiver and provides an output count. The ripple counter may count either ones or zeros. A second ripple counter counts the number of a clock signals over the same period of time. The output count is either multiplied by two or the count of clock signals is divided by two. A ripple comparator may then compare the outputs and adjust the reference voltage based upon the comparison results.

    Abstract translation: 公开了装置，方法和系统，包括例如用于接收校准电压的数据接收器和用于校准数据接收器的参考电压。 数据接收器的输出被提供给第一纹波计数器，其对来自数据接收器的输出进行计数并提供输出计数。 纹波计数器可以计数一个或零个数。 第二个纹波计数器在同一时间段内对时钟信号的数量进行计数。 输出计数乘以2，或将时钟信号的计数除以2。 然后，纹波比较器可以比较输出并基于比较结果来调整参考电压。

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