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公开(公告)号：US20220236995A1
公开(公告)日：2022-07-28
申请号：US17680538
申请日：2022-02-25
Applicant: Micron Technology, Inc.
Inventor： Glen E. Hush , Aaron P. Boehm , Fa-Long Luo
Abstract: Systems, apparatuses, and methods for organizing bits in a memory device are described. In a number of embodiments, an apparatus can include an array of memory cells, a data interface, a multiplexer coupled between the array of memory cells and the data interface, and a controller coupled to the array of memory cells, the controller configured to cause the apparatus to latch bits associated with a row of memory cells in the array in a number of sense amplifiers in a prefetch operation and send the bits from the sense amplifiers, through a multiplexer, to a data interface, which may include or be referred to as DQs. The bits may be sent to the DQs in a particular order that may correspond to a particular matrix configuration and may thus facilitate or reduce the complexity of arithmetic operations performed on the data.
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12.发明授权公开(公告)号：US11269661B2
公开(公告)日：2022-03-08
申请号：US16292091
申请日：2019-03-04
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Jeremy Chritz , Tamara Schmitz , Fa-Long Luo , David Hulton
IPC: G06F15/82 , G06F9/38 , G06F9/448 , G06F12/0842 , G06F9/50
Abstract: Methods, apparatuses, and systems for implementing data flows in a processor are described herein. A data flow manager may be configured to generate a configuration packet for a compute operation based on status information regarding multiple processing elements of the processor. Accordingly, multiple processing elements of a processor may concurrently process data flows based on the configuration packet. For example, the multiple processing elements may implement a mapping of processing elements to memory, while also implementing identified paths, through the processor, for the data flows. After executing the compute operation at certain processing elements of the processor, the processing results may be provided. In speech signal processing operations, the processing results may be compared to phonemes to identify such components of human speech in the processing results. Once dynamically identified, the processing elements may continue comparing additional components of human speech to facilitate processing of an audio recording, for example.
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公开(公告)号：US11258473B2
公开(公告)日：2022-02-22
申请号：US16848514
申请日：2020-04-14
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Fa-Long Luo
IPC: H04B1/04 , H04B1/10 , G06N3/04 , H04B7/0413
Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of multiple frequency bands transmission with a recurrent neural network that compensates for the self-interference noise generated by power amplifiers at harmonic frequencies of a respective wireless receiver. The recurrent neural network may be coupled to antennas of a wireless device and configured to generate the adjusted signals that compensate self-interference. The recurrent neural network may include a network of processing elements configured to combine transmission signals into sets of intermediate results. Each set of intermediate results may be summed in the recurrent neural network to generate a corresponding adjusted signal. The adjusted signal is receivable by a corresponding wireless receiver to compensate for the self-interference noise generated by a wireless transmitter transmitting on the same or different frequency band as the wireless receiver is receiving.
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公开(公告)号：US20210173893A1
公开(公告)日：2021-06-10
申请号：US16705096
申请日：2019-12-05
Applicant: Micron Technology, Inc.
Inventor： Fa-Long Luo
Abstract: Methods and apparatus for performing diversity matrix operations within a memory fabric. Various embodiments of the present disclosure are directed to converting a memory array into a matrix fabric for spatial diversity-related matrix transformations and performing matrix operations therein. Exemplary embodiments described herein perform MIMO-related matrix transformations (e.g., precoding, beamforming, or data recovery matrix operations) within a memory device that includes a matrix fabric and matrix multiplication unit (MMU). In one variant, the matrix fabric uses a “crossbar” construction of resistive elements. Each resistive element stores a level of impedance that represents the corresponding matrix coefficient value. The crossbar connectivity can be driven with an electrical signal representing the input vector as an analog voltage. The resulting signals can be converted from analog voltages to a digital values by an MMU to yield a matrix-vector product. The MMU may additionally perform various other logical operations within the digital domain.
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公开(公告)号：US20210119690A1
公开(公告)日：2021-04-22
申请号：US17138299
申请日：2020-12-30
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Fa-Long Luo , Jaime Cummins , Tamara Schmitz , Jeremy Chritz
Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of mixing input data with coefficient data specific to a processing mode selection. For example, a computing system with processing units may mix the input data for a transmission in a radio frequency (RF) wireless domain with the coefficient data to generate output data that is representative of the transmission being processed according to a specific processing mode selection. The input data is mixed with coefficient data at layers of multiplication/accumulation processing units (MAC units). The processing mode selection may be associated with an aspect of a wireless protocol. Examples of systems and methods described herein may facilitate the processing of data for 5G wireless communications in a power-efficient and time-efficient manner.
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Patent Agency Ranking
公开(公告)号：US20200374678A1
公开(公告)日：2020-11-26
申请号：US16988971
申请日：2020-08-10
Applicant: Micron Technology, Inc.
Inventor： Fa-Long Luo , Glen E. Hush , Aaron P. Boehm
Abstract: Methods, apparatuses, and systems related to wireless main memory for computing are described. A device may include a processor that is wirelessly coupled to a memory array, which may be in a physically separate device. The processor may execute instructions stored in and wirelessly communicated from the memory array. The processor may read data from or write data to the memory array via a wireless communication link (e.g., using resources of an ultra high frequency, super high frequency, and/or extremely high frequency band). Several devices may have a small amount of local memory (or no local memory) and may share, via a wireless communication link, a main memory array. Memory devices may include memory resources and transceiver resources; they may be configured to use one or several communication protocols over licensed or shared frequency spectrum bands, directly (e.g., device-to-device) or indirectly (e.g., via a base station).
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公开(公告)号：US10763905B1
公开(公告)日：2020-09-01
申请号：US16435264
申请日：2019-06-07
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Fa-Long Luo , Jaime Cummins , Tamara Schmitz , Jeremy Chritz
Abstract: Systems, methods, and apparatuses for wireless communication are described. Input data for in-phase branch/quadrature branch (I/Q) imbalance or mismatch may be compensated for or non-linear power amplifier noise may be used to generate compensated input data. In some examples, a transmitter may be configured to transmit communications signaling via a first antenna, the transmitter including a filter configured for digital mismatch correction; a receiver may be configured to receive communications signaling via a second antenna; and a switch may be configured to selectively activate a first switch path to couple the transmitter and the first antenna and a second switch path to couple the receiver and the transmitter to provide communications signaling received via the transmitter as feedback for the filter through the receiver.
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公开(公告)号：US20200274608A1
公开(公告)日：2020-08-27
申请号：US16282916
申请日：2019-02-22
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Fa-Long Luo , Jaime Cummins , Tamara Schmitz , Jeremy Chritz
Abstract: Examples described herein include systems and methods which include wireless devices and systems with examples of mixing input data with coefficient data specific to a processing mode selection. For example, a computing system with processing units may mix the input data for a transmission in a radio frequency (RF) wireless domain with the coefficient data to generate output data that is representative of the transmission being processed according to a specific processing mode selection. The input data is mixed with coefficient data at layers of multiplication/accumulation processing units (MAC units). The processing mode selection may be associated with an aspect of a wireless protocol. Examples of systems and methods described herein may facilitate the processing of data for 5G wireless communications in a power-efficient and time-efficient manner.
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公开(公告)号：US20200210816A1
公开(公告)日：2020-07-02
申请号：US16233576
申请日：2018-12-27
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Fa-Long Luo , Jaime Cummins , Tamara Schmitz
Abstract: Examples described herein utilize multi-layer neural networks to decode encoded data (e.g., data encoded using one or more encoding techniques). The neural networks may have nonlinear mapping and distributed processing capabilities which may be advantageous in many systems employing the neural network decoders. In this manner, neural networks described herein may be used to implement error code correction (ECC) decoders.
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公开(公告)号：US20200076481A1
公开(公告)日：2020-03-05
申请号：US16115866
申请日：2018-08-29
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Fa-Long Luo , JAIME CUMMINS , TAMARA SCHMITZ , JEREMY CHRITZ
IPC: H04B7/0413 , G06N3/04 , G06N3/08
Abstract: Examples described herein include systems and methods, including wireless devices and systems with neuron calculators that may perform one or more functionalities of a wireless transceiver. The neuron calculator calculates output signals that may be implemented, for example, using accumulation units that sum the multiplicative processing results of ordered sets from ordered neurons with connection weights for each connection between an ordered neuron and outputs of the neuron calculator. The ordered sets may be a combination of some input signals, with the number of signals determined by an order of the neuron. Accordingly, a kth-order neuron may include an ordered set comprising product values of k input signals, where the input signals are selected from a set of k-combinations with repetition. As an example in a wireless transceiver, the neuron calculator may perform channel estimation as a channel estimation processing component of the receiver portion of a wireless transceiver.
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