公开(公告)号：US20170352402A1

公开(公告)日：2017-12-07

申请号：US15682775

申请日：2017-08-22

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Noriaki Mochida

IPC: G11C11/4091 ,  G11C11/408 ,  G11C11/4076 ,  G11C11/406 ,  G11C11/4094 ,  G11C8/12

CPC classification number: G11C11/4091 ,  G11C8/12 ,  G11C11/40618 ,  G11C11/4076 ,  G11C11/4087 ,  G11C11/4094

Abstract: Apparatuses and methods for providing activation timings of sense amplifiers in a semiconductor device are described. An example apparatus includes: a first memory bank including at least one first sense amplifier that is enabled responsive to a first activation signal; a second memory bank including at least one second sense amplifier that is enabled responsive to a second activation signal; and a control circuit that receives a control signal. The control circuit includes a delay circuit that provides a delayed control signal by delaying the control signal, a first sense amplifier control circuit coupled to the first delay circuit and provides the first activation signal respective to the delayed control signal when the first memory bank is designated, and a second sense amplifier control circuit coupled to the delay circuit and provides the second activation signal respective to the delayed control signal when the second memory bank is designated.

公开(公告)号：US20170103798A1

公开(公告)日：2017-04-13

申请号：US15382358

申请日：2016-12-16

Applicant: Micron Technology, Inc.

Inventor： Noriaki Mochida

IPC: G11C11/408 ,  G11C11/4097

CPC classification number: G11C11/4085 ,  G11C8/08 ,  G11C11/4097

Abstract: The present invention is provided with; subword drivers SWD for driving subword lines SWL, a selection circuit for supplying either negative potential VKK1 or VKK2 to the subword drivers SWD, and memory cells MC that are selected in the case when the subword line SWL is set to an active potential VPP and are not selected in the case when the subword line SWL is either a negative potential VKK1 or VKK2.